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| 型號： | ARM966E-S |
| 英文描述： | ARM966E-S Microprocessor Core preliminary technical manual 6/01 |
| 中文描述： | ARM966E - ?微處理器核的初步技術(shù)手冊6月1日 |
| 文件頁數(shù)： | 65/166頁 |
| 文件大?。?/td> | 1145K |
| 代理商： | ARM966E-S |
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Exception Flow
Rev. A
4-3
Copyright 1999-2001 by LSI Logic Corporation. All rights reserved.
registers for R14 and R13. One interrupt mode has more banked
registers for fast interrupt processing.
After an exception, R14 holds the return address for exception
processing. This address is used to return after the exception is
processed and to address the instruction that caused the exception.
R13 is banked across exception modes to provide each exception
handler with a private stack pointer (SP). The fast interrupt mode also
banks registers 8 through 12, so that interrupt processing can begin
without the need to save or restore these registers. The system mode
does not have any banked registers; it uses the User-mode registers.
System mode is used to run normal (nonexception) tasks that require a
privileged processor mode.
All other processor states are held in the status registers: CPSR and
SPSR. The current operating processor status is in the Current Program
Status Register (CPSR). The CPSR holds four condition code flags (N,
Z, C, and V), two interrupt disable bits (IRQ and FIQ), and five bits that
encode the current processor mode.
All exception modes except for User and System have a Saved Program
Status Register (SPSR), which holds the CPSR of the task immediately
before the exception occurred. Both the CPSR and SPSR are accessed
with special instructions.
When an exception occurs, the ARM9E-S processor core halts execution
after the current instruction and begins execution at the fixed address in
low memory, pointed at by the exception vectors. Each exception has a
separate vector location. Memory aborts have two vector locations to
distinguish between data and instruction accesses.
At initialization, the operating system installs a handler on every
exception. Privileged operating system tasks are normally run in System
mode to allow exceptions to occur within the operating system without
state loss. Exceptions overwrite their R14 when an exception occurs, and
System mode is the only privileged mode that cannot be entered by an
exception.
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