參數資料
型號： ARM966E-S
英文描述： ARM966E-S Microprocessor Core preliminary technical manual 6/01
中文描述： ARM966E - ?微處理器核的初步技術手冊6月1日
文件頁數： 24/166頁
文件大?。?/td> 1145K
代理商： ARM966E-S
2-4
Signal Descriptions
Rev. A
Copyright 1999-2001 by LSI Logic Corporation. All rights reserved.
HBURST[2:0] Burst Type
Output
This output indicates whether the transfer forms part of a
burst. The ARM966E-S generates burst types of SINGLE
and INCR only.
HBUSREQ
Bus Request
HBUSREQ is a signal from the ARM966E-S to the bus
arbiter. A HIGH in this output indicates that the core
requires the bus.
Output
HGRANT
Bus Grant
A HIGH on this signal indicates the ARM966E-S is
currently the highest priority master. Ownership of the
address/control signals changes at the end of a transfer
when HREADY is HIGH. A master gets access to the bus
when both HREADY and HGRANT are HIGH.
Input
HLOCK
Locked Transfer
When HLOCK is HIGH, it indicates that the ARM966E-S
requires locked access to the bus, and that no other
masters should be granted the bus until HLOCK is LOW.
HLOCK is asserted when the ARM966E-S is executing
the SWAP instruction.
Output
HPROT[3:0]
Protection Control
This output provides additional information about a bus
access. HPROT[3:0] are primarily intended for use by any
module that implements some level of protection.
Output
HBURST[2:0] Burst Type
Description
000
001
SINGLE
INCR
Single transfer
Incrementing burst of
unspecified length
Not supported
010–111
Reserved
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