參數(shù)資料
型號: ARM966E-S
英文描述: ARM966E-S Microprocessor Core preliminary technical manual 6/01
中文描述: ARM966E - ?微處理器核的初步技術(shù)手冊6月1日
文件頁數(shù): 72/166頁
文件大?。?/td> 1145K
代理商: ARM966E-S
5-2
AHB Interface Unit
Rev. A
Copyright 1999-2001 by LSI Logic Corporation. All rights reserved.
and response signal multiplexer, which selects the signals from the slave
that is involved in the transfer.
Figure 5.1 shows the structure that is required to implement an AHB
design with three masters and four slaves.
Figure 5.1
Multiplexer Interconnection
5.2 AHB Interface Signals
This section describes the signals that determine the transfer type and
burst type of each AHB transfer. It also describes the control signals that
provide additional information on the transfers.
Slave
#1
Slave
#2
Slave
#3
Slave
#4
HADDR
HADDR
HADDR
HADDR
HWDATA
HWDATA
HWDATA
HWDATA
Master
#1
Master
#2
Master
#3
HADDR
HADDR
HADDR
HWDATA
HWDATA
HWDATA
Address/
Control Mux
Decoder
Arbiter
HRDATA
HRDATA
HRDATA
Mux
Mux
HRDATA
HRDATA
HRDATA
HRDATA
Write Data
Mux
Read Data
Mux
Mux
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