參數(shù)資料
型號： ARM966E-S
英文描述： ARM966E-S Microprocessor Core preliminary technical manual 6/01
中文描述： ARM966E - ?微處理器核的初步技術(shù)手冊6月1日
文件頁數(shù)： 11/166頁
文件大小： 1145K
代理商： ARM966E-S
Contents
Rev. A
xi
Copyright 1999–2001 by LSI Logic Corporation. All rights reserved.
11.2
RAMBIST
11-1
Appendix A
ARM9E-S Enhanced Instructions
Index
Customer Feedback
Figures
1.1
2.1
3.1
3.2
3.3
3.4
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
8.1
8.2
8.3
8.4
8.5
9.1
9.2
9.3
9.4
9.5
9.6
9.7
ARM966E-S Block Diagram
ARM966E-S Signal Diagram
Coprocessor Instruction Format
ARM966E-S Memory Map
CPU Register Organization
Program Status Registers (CPSR and SPSR) Format
Multiplexer Interconnection
Transfer Type Examples
AHB Clock Relationships
Simple Transfer
Transfer with Wait States
Multiple Transfers
Incrementing Bursts with Undefined Lengths
Transfer with Retry Response
Error Response
SRAM Read Cycle
ARM966E-S SRAM Hierarchy
ONESEGX32 Interface
FOURSEGX32 Interface
FOURSEGX8 Interface
CLK and CPCLKEN Timing
LDC/STC Cycle Timing
MCR/MRC Cycle Timing
Interlocked MCR
Late Cancelled CDP
Privileged Instructions
Stalling and Interrupts
1-3
2-2
3-4
3-5
3-6
3-8
5-2
5-4
5-11
5-13
5-14
5-14
5-16
5-18
5-18
8-2
8-6
8-7
8-8
8-10
9-2
9-3
9-6
9-7
9-8
9-9
9-10
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