參數(shù)資料
型號(hào): ARM966E-S
英文描述: ARM966E-S Microprocessor Core preliminary technical manual 6/01
中文描述: ARM966E - ?微處理器核的初步技術(shù)手冊(cè)6月1日
文件頁數(shù): 18/166頁
文件大?。?/td> 1145K
代理商: ARM966E-S
1-6
Introduction
Rev. A
Copyright 1999-2001 by LSI Logic Corporation. All rights reserved.
1.2.10 Embedded Trace Module Interface
This interface connects to an external Embedded Trace Module (ETM).
The ETM provides a high-speed port for tracing of the processor core in
real time.
1.3 Feature Summary
This section lists the key features of the ARM966E-S microprocessor
core:
ARM9E-S processor core
Instruction and Data RAMs with independent sizes up to 64 Mbytes
DMA Interface to Data RAM
ARM Advanced High-Performance Bus (AHB) interface unit with
write buffer
Write buffer depth: 16 words at up to four addresses
Burst transfers
Split transactions
External coprocessor interface
System controller arbitrates between instruction and data memories
and AHB
Embedded trace module provides a real-time trace capability
1.4 CoreWare Program
An LSI Logic core is a fully defined, optimized, and reusable block of
logic. It supports industry-standard functions and has predefined timing
and layout. The core is also an encrypted RTL simulation model for a
wide range of VHDL and Verilog simulators.
The CoreWare library contains an extensive set of complex cores for the
storage, communications, consumer, and computer markets. The library
consists of high-speed interconnect functions such as the GigaBlaze
G10
Core, DSPs, MPEG-2 decoders, a PCI core, and many more.
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