參數(shù)資料
型號(hào)： ARM966E-S
英文描述： ARM966E-S Microprocessor Core preliminary technical manual 6/01
中文描述： ARM966E - ?微處理器核的初步技術(shù)手冊(cè)6月1日
文件頁數(shù)： 10/166頁
文件大?。?/td> 1145K
代理商： ARM966E-S
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Contents
Rev. A
Copyright 1999–2001 by LSI Logic Corporation. All rights reserved.
9.2.2
9.2.3
9.2.4
Privileged Instructions
Stalling and Interrupts
MCR/MRC Instructions
Interlocked MCRs
CDP Instructions
9-5
9-6
9-7
9-8
9-9
9.3
9.4
Chapter 10
Debug
10.1
Debug Systems
10.1.1
10.1.2
10.1.3
About the Debug Interface
10.2.1
Stages of Debug
10.2.2
Clocks
Scan Chain 15
Breakpoints, Watchpoints, and External Debug Requests
10.4.1
Entry into Debug State on Breakpoint
10.4.2
Breakpoints and Exceptions
10.4.3
Watchpoints
10.4.4
Watchpoints and Exceptions
10.4.5
Debug Request
10.4.6
Actions of the ARM9E-S Core in Debug State
ARM9E-S Clock Domains
Determining the Core and System States
About the EmbeddedICE-RT Logic
Disabling the EmbeddedICE-RT Logic
The Debug Communications Channel
10.9.1
Debug Communication Channel Registers
10.9.2
Debug Communications Channel Status
Register
10.9.3
Communications Channel Monitor Mode
Debug Status Register
10.9.4
Using the Communications Channel
10.10 Real-Time Debug
10-1
10-2
10-2
10-3
10-4
10-5
10-5
10-6
10-8
10-9
10-10
10-11
10-13
10-13
10-13
10-14
10-14
10-14
10-16
10-16
10-17
The Debug Host
The Protocol Converter
Debug Target
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
10-17
10-18
10-19
10-20
Chapter 11
Test Methodology
11.1
Scan Insertion
11-1
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