參數(shù)資料
型號： FW82815
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁數(shù)： 97/172頁
文件大?。?/td> 795K
代理商： FW82815
82815 GMCH
R
Datasheet
97
3.5.19.
PMBASE—Prefetchable Memory Base Address Register
(Device 1)
Address Offset:
24–25h
Default Value:
FFF0h
Access:
Read/Write
Size:
16 bits
This register controls the processor to PCI1 prefetchable memory accesses routing based on the
following formula:
PREFETCHABLE_MEMORY_BASE
≤
address
≤
PREFETCHABLE_MEMORY_LIMIT
The upper 12 bits of the register are read/write and correspond to the upper 12 address bits A[31:20] of
the 32 bit address. The bottom 4 bits of this register are read-only and return zeroes when read. The
configuration software must initialize this register. For the purpose of address decode, address bits
A[19:0] are assumed to be 0. Thus, the bottom of the defined memory address range will be aligned to a
1 MB boundary.
15
4
3
0
Prefetchable Memory Address Base
Reserved
Bit
Description
15: 4
Prefetchable Memory Address Base(PMEM_BASE).
Corresponds to A[31:20] of the memory
address. (Default=FFFh)
3:0
Reserved.
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參數(shù)描述
FW82815 S L5NQ 制造商:Intel 功能描述:Graphics and Memory Controller Hub 544-Pin BGA
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