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參數(shù)資料
| 型號(hào)： | FW82815 |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁(yè)數(shù)： | 3/172頁(yè) |
| 文件大?。?/td> | 795K |
| 代理商： | FW82815 |
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82815 GMCH
R
Datasheet
3
Contents
1.
Overview.....................................................................................................................................13
1.1.
Related Documents .......................................................................................................13
1.2.
The Intel
815 Chipset Family........................................................................................14
1.3.
82815 GMCH Overview.................................................................................................16
1.4.
Host Interface.................................................................................................................17
1.5.
System Memory Interface..............................................................................................17
1.6.
Multiplexed AGP and Display Cache Interface..............................................................18
1.6.1.
AGP Interface ..............................................................................................18
1.6.2.
Display Cache Interface...............................................................................18
1.7.
Hub Interface..................................................................................................................18
1.8.
82815 GMCH Integrated Graphics Support...................................................................19
1.8.1.
Display, Digital Video Out, and LCD/Flat Panel/Digital CRT........................19
1.9.
System Clocking ............................................................................................................20
1.10.
GMCH Power Delivery...................................................................................................20
2.
Signal Description.......................................................................................................................21
2.1.
Host Interface Signals....................................................................................................22
2.2.
System Memory Interface Signals .................................................................................23
2.3.
AGP Interface Signals....................................................................................................24
2.3.1.
AGP Addressing Signals..............................................................................24
2.3.2.
AGP Flow Control Signals............................................................................25
2.3.3.
AGP Status Signals .....................................................................................25
2.3.4.
AGP Clocking Signals (Strobes)..................................................................26
2.3.5.
AGP FRAME# Signals.................................................................................27
2.4.
Display Cache Interface Signals....................................................................................29
2.5.
Hub Interface Signals.....................................................................................................30
2.6.
Display Interface Signals................................................................................................30
2.7.
Digital Video Output Signals/TV-Out Pins......................................................................31
2.8.
Power Signals ................................................................................................................32
2.9.
Clock Signals .................................................................................................................32
2.10.
GMCH Power-Up/Reset Strap Options..........................................................................33
2.11.
Multiplexed Display Cache and AGP Signal Mapping....................................................34
2.11.1.
Display Cache Mapping at the AGP Connector...........................................35
3.
Configuration Registers..............................................................................................................37
3.1.
Register Nomenclature and Access Attributes ..............................................................37
3.2.
PCI Configuration Space Access...................................................................................38
3.2.1.
PCI Bus Configuration Mechanism..............................................................38
3.2.2.
Logical PCI Bus #0 Configuration Mechanism.............................................39
3.2.3.
Primary PCI (PCI0) and Downstream Configuration Mechanism................39
3.2.4.
Internal Graphics Device Configuration Mechanism....................................39
3.2.5.
GMCH Register Introduction........................................................................39
3.3.
I/O Mapped Registers....................................................................................................40
3.3.1.
CONF_ADDR
Configuration Address Register.........................................40
3.3.2.
CONF_DATA
Configuration Data Register...............................................41
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| FWA-25A10F | Fuse |
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相關(guān)代理商/技術(shù)參數(shù) |
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| FW82815 S L5NQ | 制造商:Intel 功能描述:Graphics and Memory Controller Hub 544-Pin BGA |
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| FW82815SL5NQ | 制造商:Intel 功能描述: |
| FW828201CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
| FW82840 S L3TA | 制造商:Intel 功能描述:Memory Controller Hub 544-Pin BGA |
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