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82815 GMCH
R
Datasheet
31
2.7.
Digital Video Output Signals/TV-Out Pins
Signal Name
Type
Description
TVCLKIN/INT#
I
1.8V
Low Voltage TV Clock In (TV-Out Mode).
In 1.8V TV-Out usage, the TVCLKIN
pin functions as a pixel clock input to the GMCH from the TV encoder. The
TVCLKIN frequency ranges from 20 MHz to 40 MHz depending on the mode
(e.g., NTSC or PAL) and the overscan compensation values in the TV Encoder.
CLKIN has a worse case duty cycle of 60%/40% coming in to the GMCH.
Flat Panel Interrupt (LCD Mode).
In Flat Panel usage, the INT# pin is asserted
to cause an interrupt (typically, to indicate a hot plug or unplug of a flat panel). In
Flat Panel usage, this pin is connected internally to a pull-up resistor.
LTVCLKOUT[1:0]
O
1.8V
LCD/TV Port Clock Out:
These pins provide a differential pair reference clock
that can run up to 85 MHz.
Note:
It is always recommended that these pins be used as a differential pair.
Devices running at frequencies less than 65 MHz can operate in single-ended
clock mode and use LTVCLKOUT[0] as the clock. When operating in single-
ended clock mode, LTVCLKOUT[1] is not used.
LTVBLANK#
O
1.8V
Flicker Blank or Border Period Indication.
BLANK# is a programmable output
pin driven by the graphics control. When programmed as a blank period
indication, this pin indicates active pixels excluding the border. When
programmed as a border period indication, this pin indicates active pixel
including the border pixels.
LTVDATA[11:0]
O
1.8V
LCD/TV Data.
These signals are used to interface to the LCD/TV-Out data bus.
LTVVSYNC
O
1.8V
Vertical Sync.
VSYNC signal for the LTV interface. The active polarity of the
signal is programmable.
LTVHSYNC
O
1.8V
Horizontal Sync.
HSYNC signal for the LTV interface. The active polarity of the
signal is programmable.
LTVCK
I/OD
CMOS
LCD/TV Clock.
Clock pin for 2-wire interface.
LTVDA
I/OD
CMOS
LCD/TV Data.
Data pin for 2-wire interface.