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| 型號(hào)： | FW82815 |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁(yè)數(shù)： | 37/172頁(yè) |
| 文件大?。?/td> | 795K |
| 代理商： | FW82815 |
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82815 GMCH
R
Datasheet
37
3.
Configuration Registers
This chapter describes the following register sets:
PCI Configuration Registers.
The GMCH contains PCI configuration registers for Device 0
(Host-hub interface Bridge/DRAM Controller), Device 1 (AGP Bridge), and Device 2 (GMCH
internal graphics device).
Display Cache Interface Registers.
This register set is used for configuration of the Display Cache
(DC) interface. The registers are located in memory space. The memory space addresses listed are
offsets from the base memory address programmed into the MMADR register (Device 2, PCI
configuration offset 14h).
Display Cache Detect and Diagnostic Registers.
This register set can be used for DC memory
detection and testing. These registers are accessed via either I/O space or memory space. The
memory space addresses listed are offsets from the base memory address programmed into the
MMADR register (Device 1, PCI configuration offset 14h).
Note that the GMCH also contains an extensive set of registers and instructions for controlling its
graphics operations. Intel graphics drivers provide the software interface at this architectural level. The
register/instruction interface is transparent at the Application Programmers Interface (API) level and
thus, beyond the scope of this document.
3.1.
Register Nomenclature and Access Attributes
Mnemonic
Description
RO
Read-Only. If a register is read-only, writes to this register have no effect.
R/W
Read/Write. A register with this attribute can be read and written
R/WC
Read/Write Clear. A register bit with this attribute can be read and written. However, a write of a 1
clears (sets to 0) the corresponding bit and a write of a 0 has no effect.
R/WO
Read/Write-Once. A register bit with this attribute can be written to only once after power up.
After the first write, the bit becomes read-only.
Reserved
Bits
Some of the GMCH registers described in this section contain reserved bits. These bits are
labeled “Reserved” or “Intel Reserved”. Software must deal correctly with fields that are reserved.
On reads, software must use appropriate masks to extract the defined bits and not rely on
reserved bits being any particular value. On writes, software must ensure that the values of
reserved bit positions
are preserved. That is, the values of reserved bit positions must first be
read, merged with the new values for other bit positions and then written back. Note that software
does not need to perform read, merge, write operation for the configuration address register.
Reserved
Registers
In addition to reserved bits within a register, the GMCH contains address locations in the
configuration space of the Host-hub interface Bridge/DRAM Controller and the internal graphics
device entities that are marked either “Reserved” or Intel Reserved”. When a “Reserved” register
location is read, a random value can be returned. (“Reserved” registers can be 8-, 16-, or 32-bit in
size). Registers that are marked as “Reserved” must not be modified by system software. Writes
to “Reserved” registers may cause system failure.
Default
Value Upon
Reset
Upon a Full Reset, the GMCH sets all of its internal configuration registers to predetermined
default
states. Some register values at reset are determined by external strapping options. The
default state represents the minimum functionality feature set required to successfully bring up
the system. Hence, it does not represent the optimal system configuration. It is the responsibility
of the system initialization software (usually BIOS) to properly determine the DRAM
configurations, operating parameters, and optional system features that are applicable, and to
program the GMCH registers accordingly.
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相關(guān)代理商/技術(shù)參數(shù) |
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| FW82815 S L5NQ | 制造商:Intel 功能描述:Graphics and Memory Controller Hub 544-Pin BGA |
| FW82815EM S L4MP | 制造商:Intel 功能描述:GRAPHICS AND MEMORY CONTROLLER HUB (GMCH2-M) |
| FW82815SL5NQ | 制造商:Intel 功能描述: |
| FW828201CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
| FW82840 S L3TA | 制造商:Intel 功能描述:Memory Controller Hub 544-Pin BGA |
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