- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370261 > FW82815 Controller Miscellaneous - Datasheet Reference PDF資料下載
參數(shù)資料
| 型號： | FW82815 |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 124/172頁 |
| 文件大?。?/td> | 795K |
| 代理商： | FW82815 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁當前第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁
82815 GMCH
R
124
Datasheet
Video Buffer Area (A0000h–BFFFFh)
The 128 KB graphics adapter memory region is normally mapped to a legacy video device on the hub
interface/PCI (typically VGA controller). This area is not controlled by attribute bits and processor –
initiated cycles in this region are forwarded to either the hub interface or the AGP/internal graphics
device for termination. This region is also the default region for SMM space.
Accesses to this range are directed to either the hub interface or the AGP/internal graphics device based
on the configuration. The configuration is specified by:
1. AGP on/off configuration bit
2. AGP off: GMS bits of the SMRAM register in the GMCH Device #0 configuration space. There is
additional steering information coming from the Device #2 configuration registers and from some
of the VGA registers in the Graphics device.
3. AGP on: PCICMD1 (PCI-PCI Command) and BCTRL (PCI-PCI Bridge Control) registers in
Device #1 configuration registers
The control is applied for accesses initiated from any of the system interfaces; that is, processor bus, the
hub interface, or AGP(if enabled). Note that for hub interface to AGP/PCI accesses, only memory write
operations are supported. Any AGP/PCI initiated VGA accesses targeting the GMCH will master abort.
For more details, see the descriptions in the configuration registers specified above.
The SMRAM Control register controls how SMM accesses to this space are treated.
Monochrome Adapter (MDA) Range (B0000h–B7FFFh)
Legacy support requires the ability to have a second graphics controller (monochrome) in the system.
In an AGP system, accesses in the standard VGA range are forwarded to the AGP bus (depending on
configuration bits). Since the monochrome adapter may be on the hub interface/PCI (or ISA) bus, the
GMCH must decode cycles in the MDA range and forward them to the hub interface. This capability is
controlled by a configuration bit (MDA bit – Device 0, BEh). In addition to the memory range B0000h
to B7FFFh, the GMCH decodes IO cycles at 3B4h, 3B5h, 3B8h, 3B9h, 3Bah and 3BFh and forwards
them to the hub interface bus
In an internal graphics system, the GMS bits of the SMRAM register in Device #0, bits in the Device 2
PCICMD2 register and bits from some of the VGA registers control this functionality.
Expansion Area (C0000h–DFFFFh)
This 128 KB ISA Expansion region is divided into eight 16 KB segments. Each segment can be assigned
one of four read/write states: read only, write-only, read/write, or disabled. Typically, these blocks are
mapped through GMCH and are subtractively decoded to ISA space. Memory that is disabled is not
remapped.
Extended System BIOS Area (E0000h–EFFFFh)
This 64 KB area is divided into four 16 KB segments. Each segment can be assigned independent read
and write attributes so it can be mapped either to main DRAM or to the hub interface. Typically, this area
is used for RAM or ROM. Memory segments that are disabled are not remapped elsewhere.
相關PDF資料 |
PDF描述 |
|---|---|
| FWA-25A10F | Fuse |
| FWA-30A10F | Fuse |
| FWA-35A21F | Fuse |
| FWA-40A21F | Fuse |
| FWA-45A21F | Fuse |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FW82815 S L5NQ | 制造商:Intel 功能描述:Graphics and Memory Controller Hub 544-Pin BGA |
| FW82815EM S L4MP | 制造商:Intel 功能描述:GRAPHICS AND MEMORY CONTROLLER HUB (GMCH2-M) |
| FW82815SL5NQ | 制造商:Intel 功能描述: |
| FW828201CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
| FW82840 S L3TA | 制造商:Intel 功能描述:Memory Controller Hub 544-Pin BGA |
發(fā)布緊急采購，3分鐘左右您將得到回復。