參數(shù)資料
型號(hào): FW82815
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù): 53/172頁(yè)
文件大小: 795K
代理商: FW82815
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82815 GMCH
R
Datasheet
53
3.4.15.
APCONT—Aperture Control (Device 0)
Address Offset:
Default Value:
Access:
Size:
51h
00h
Read/Write, Write-Once, Read-Only
8 bits
The Aperture Control Register controls selection and access to aperture space.
7
3
2
1
0
Reserved
AGP
Select
Lock
Aperture
Access
Global EN
AGP
Select
Bit
Description
7:3
Reserved.
2
GFX AGP Select Lock—WO.
This GFX AGP Select (bit 0) can be made read-only by this bit. This is
a write-once bit. After it is written, this bit can not be changed without a system reset.
0 = GFX AGP Select remains writeable.
1 = GFX AGP Select is read-only.
1
Aperture Access Global Enable–R/W.
This bit is used to prevent access to the aperture from any
port (processor, PCI0, or AGP/PCI1) before the aperture range is established by the configuration
software and appropriate translation table in the main DRAM has been initialized. It must be set after
system is fully configured for aperture accesses. Default is 0.
0
GFX AGP Select—R/W.
This field selects the graphics device to be either AGP or Internal Graphics
(GFX).
0 = AGP Mode. AGP interface device is enabled. All registers in device 0 and device 1 are visible.
No device 2 registers are visible; reads from those addresses return 1s.
1 = GFX Mode. Internal Graphics device is enabled. All non-AGP related device 0 registers and all
device 2 registers are visible. No device 1 registers are visible; reads from those addresses
return 1s. Reads from AGP related device 0 registers return 0s. The internal graphics device
does not respond to any configuration cycles unless SMRAM[7:6] (@ 70h) are NOT 00 AND
APCONT[0] (@ 51h) is 1.
R/W, RO if GFX AGP Select Lock (bit 2 =1)
GFX AGP Select must be programmed before any other access is made to the configuration space.
The two possible modes are mutually exclusive. This bit determines whether other configuration
registers are enabled or disabled. This bit must be set as part of the initialization sequence. See
Software Start-Up Sequence section.
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