
STD130
4-112
Samsung ASIC
PvSCKDSby
Schmitt Trigger Level Input Clock Driver
Switching Characteristics
PMSCKDSD2
(Typical process, 25
°
C, 1.8V, 2.5V, t
R
/t
F
 = 1.50ns, SL: Standard Load)
PMSCKDSD4
PMSCKDSD6
PMSCKDSD8
Path
Parameter
Delay [ns]
 SL = 2
0.121
0.128
1.089
1.363
 < 
Delay Equations [ns]
Group1*
0.117 + 0.002*SL
0.125 + 0.002*SL
1.087 + 0.001*SL
1.360 + 0.001*SL
Group2*
0.107 + 0.002*SL
0.117 + 0.002*SL
1.092 + 0.001*SL
1.373 + 0.001*SL
Group3*
0.099 + 0.002*SL
0.110 + 0.002*SL
1.093 + 0.001*SL
1.378 + 0.001*SL
PAD to Y
tR
tF
tPLH
tPHL
*Group1 : SL < 275,   *Group2 : 275 < 
Path
Parameter
Delay [ns]
 SL = 2
0.180
0.201
1.246
1.611
 < 
Delay Equations [ns]
Group1*
0.178 + 0.001*SL
0.199 + 0.001*SL
1.245 + 0.001*SL
1.610 + 0.001*SL
Group2*
0.164 + 0.001*SL
0.194 + 0.001*SL
1.262 + 0.001*SL
1.637 + 0.001*SL
Group3*
0.151 + 0.001*SL
0.184 + 0.001*SL
1.269 + 0.001*SL
1.652 + 0.001*SL
PAD to Y
tR
tF
tPLH
tPHL
*Group1 : SL < 549,   *Group2 : 549 < 
Path
Parameter
Delay [ns]
 SL = 2
0.243
0.278
1.392
1.850
 < 
Delay Equations [ns]
Group1*
0.242 + 0.001*SL
0.277 + 0.001*SL
1.391 + 0.000*SL
1.849 + 0.000*SL
Group2*
0.230 + 0.001*SL
0.274 + 0.001*SL
1.422 + 0.000*SL
1.889 + 0.000*SL
Group3*
0.215 + 0.001*SL
0.266 + 0.001*SL
1.437 + 0.000*SL
1.913 + 0.000*SL
PAD to Y
tR
tF
tPLH
tPHL
*Group1 : SL < 823,   *Group2 : 823 < 
Path
Parameter
Delay [ns]
 SL = 2
0.302
0.355
1.530
2.082
 < 
Delay Equations [ns]
Group1*
0.301 + 0.000*SL
0.354 + 0.000*SL
1.529 + 0.000*SL
2.081 + 0.000*SL
Group2*
0.297 + 0.000*SL
0.357 + 0.000*SL
1.572 + 0.000*SL
2.133 + 0.000*SL
Group3*
0.282 + 0.000*SL
0.350 + 0.000*SL
1.597 + 0.000*SL
2.166 + 0.000*SL
PAD to Y
tR
tF
tPLH
tPHL
*Group1 : SL < 1096,   *Group2 : 1096 <