
STD130
3-50
Samsung ASIC
NR2B/NR2BD2/NR2BD4/NR2BD8
2-Input NOR with one Inverted Input, 1X/2X/4X/8X Drive
Logic Symbol
Cell Data
Switching Characteristics
NR2B
(Typical process, 25
°
C, 1.8V, t
R
/t
F
= 0.15ns, SL: Standard Load)
NR2BD2
Input Load (SL)
NR2B
NR2BD2
NR2BD4
NR2BD8
AN
0.7
AN
0.7
B
AN
0.9
B
AN
0.7
B
B
1.1
2.2
Gate Count
0.8
1.1
NR2B
1.67
NR2BD2
2.33
NR2BD4
3.67
NR2BD8
5.00
Truth Table
AN
B
0
1
0
1
Y
0
0
1
0
0
0
1
1
Y
AN
B
Path
Parameter
Delay [ns]
SL = 2
0.156
0.073
0.114
0.133
0.165
0.101
0.105
0.072
<
Delay Equations [ns]
Group1*
0.072 + 0.042*SL
0.040 + 0.017*SL
0.076 + 0.019*SL
0.111 + 0.011*SL
0.085 + 0.040*SL
0.072 + 0.015*SL
0.066 + 0.019*SL
0.050 + 0.011*SL
Group2*
0.070 + 0.042*SL
0.041 + 0.016*SL
0.077 + 0.019*SL
0.116 + 0.010*SL
0.080 + 0.041*SL
0.069 + 0.015*SL
0.068 + 0.019*SL
0.057 + 0.009*SL
Group3*
0.069 + 0.042*SL
0.036 + 0.017*SL
0.077 + 0.019*SL
0.119 + 0.009*SL
0.073 + 0.042*SL
0.060 + 0.016*SL
0.068 + 0.019*SL
0.057 + 0.009*SL
AN to Y
tR
tF
tPLH
tPHL
tR
tF
tPLH
tPHL
B to Y
*Group1 : SL < 4, *Group2 : =
Path
Parameter
Delay [ns]
SL = 2
0.107
0.055
0.098
0.125
0.118
0.085
0.081
0.057
<
Delay Equations [ns]
Group1*
0.067 + 0.020*SL
0.039 + 0.008*SL
0.078 + 0.010*SL
0.112 + 0.006*SL
0.080 + 0.019*SL
0.069 + 0.008*SL
0.059 + 0.011*SL
0.043 + 0.007*SL
Group2*
0.063 + 0.021*SL
0.039 + 0.008*SL
0.079 + 0.009*SL
0.118 + 0.005*SL
0.074 + 0.021*SL
0.071 + 0.007*SL
0.064 + 0.009*SL
0.050 + 0.005*SL
Group3*
0.059 + 0.021*SL
0.037 + 0.008*SL
0.079 + 0.009*SL
0.124 + 0.005*SL
0.066 + 0.021*SL
0.059 + 0.008*SL
0.064 + 0.009*SL
0.055 + 0.005*SL
AN to Y
tR
tF
tPLH
tPHL
tR
tF
tPLH
tPHL
B to Y
*Group1 : SL < 4, *Group2 : =