
STD130
4-26
Samsung ASIC
PvOByz
Normal Output Buffers
Switching Characteristics
POB12
(Typical process, 25
°
C, 1.8V, t
R
/t
F
 =0.15ns, CL: Capacitive Load[pF])
POB16
POB20
POB24
Path
Parameter
Delay [ns]
 CL = 50.0pF
2.524
2.373
1.462
1.574
 < 
Delay Equations [ns]
Group1*
0.251 + 0.045*CL
0.264 + 0.042*CL
0.422 + 0.021*CL
0.479 + 0.022*CL
Group2*
0.236 + 0.046*CL
0.238 + 0.043*CL
0.423 + 0.021*CL
0.474 + 0.022*CL
Group3*
0.226 + 0.046*CL
0.224 + 0.043*CL
0.423 + 0.021*CL
0.470 + 0.022*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50,   *Group2 : 50 = 
Path
Parameter
Delay [ns]
 CL = 50.0pF
1.902
1.791
1.145
1.236
 < 
Delay Equations [ns]
Group1*
0.203 + 0.034*CL
0.220 + 0.031*CL
0.365 + 0.016*CL
0.416 + 0.016*CL
Group2*
0.188 + 0.034*CL
0.195 + 0.032*CL
0.366 + 0.016*CL
0.412 + 0.016*CL
Group3*
0.179 + 0.034*CL
0.181 + 0.032*CL
0.367 + 0.016*CL
0.409 + 0.017*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50,   *Group2 : 50 = 
Path
Parameter
Delay [ns]
 CL = 50.0pF
1.549
1.471
1.038
1.125
 < 
Delay Equations [ns]
Group1*
0.209 + 0.027*CL
0.245 + 0.025*CL
0.411 + 0.013*CL
0.474 + 0.013*CL
Group2*
0.190 + 0.027*CL
0.215 + 0.025*CL
0.414 + 0.012*CL
0.471 + 0.013*CL
Group3*
0.176 + 0.027*CL
0.189 + 0.025*CL
0.415 + 0.012*CL
0.466 + 0.013*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50,   *Group2 : 50 = 
Path
Parameter
Delay [ns]
 CL = 50.0pF
1.325
1.276
0.986
1.075
 < 
Delay Equations [ns]
Group1*
0.225 + 0.022*CL
0.284 + 0.020*CL
0.456 + 0.011*CL
0.538 + 0.011*CL
Group2*
0.206 + 0.022*CL
0.250 + 0.021*CL
0.464 + 0.010*CL
0.534 + 0.011*CL
Group3*
0.187 + 0.023*CL
0.220 + 0.021*CL
0.467 + 0.010*CL
0.529 + 0.011*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50,   *Group2 : 50 =