
Samsung ASIC
4-43
STD130
PvODyz
Open Drain Output Buffers
Switching Characteristics
POD4SM
(Typical process, 25
°
C, 1.8V, t
R
/t
F
 = 0.15ns, CL: Capacitive Load[pF])
POD8SM
POD12SM
Path
Parameter
Delay [ns]
 CL = 50.0pF
7.018
4.315
0.459
7.018
4.354
0.487
 < 
Delay Equations [ns]
Group1*
0.605 + 0.128*CL
0.993 + 0.066*CL
0.459 + 0.000*CL
0.605 + 0.128*CL
1.033 + 0.066*CL
0.487 + 0.000*CL
Group2*
0.573 + 0.129*CL
0.994 + 0.066*CL
0.459 + 0.000*CL
0.573 + 0.129*CL
1.034 + 0.066*CL
0.487 + 0.000*CL
Group3*
0.557 + 0.129*CL
0.995 + 0.066*CL
0.459 + 0.000*CL
0.557 + 0.129*CL
1.033 + 0.066*CL
0.487 + 0.000*CL
TN to PAD
tF
tPHL
tPLZ
tF
tPHL
tPLZ
EN to PAD
*Group1 : CL < 50,   *Group2 : 50 = 
Path
Parameter
Delay [ns]
 CL = 50.0pF
4.090
3.649
0.603
4.090
3.688
0.630
 < 
Delay Equations [ns]
Group1*
0.928 + 0.063*CL
1.697 + 0.039*CL
0.603 + 0.000*CL
0.928 + 0.063*CL
1.736 + 0.039*CL
0.630 + 0.000*CL
Group2*
0.962 + 0.063*CL
1.828 + 0.036*CL
0.603 + 0.000*CL
0.962 + 0.063*CL
1.868 + 0.036*CL
0.630 + 0.000*CL
Group3*
0.964 + 0.063*CL
1.936 + 0.035*CL
0.603 + 0.000*CL
0.964 + 0.063*CL
1.975 + 0.035*CL
0.630 + 0.000*CL
TN to PAD
tF
tPHL
tPLZ
tF
tPHL
tPLZ
EN to PAD
*Group1 : CL < 50,   *Group2 : 50 = 
Path
Parameter
Delay [ns]
 CL = 50.0pF
3.302
2.952
0.660
3.302
2.991
0.687
 < 
Delay Equations [ns]
Group1*
1.160 + 0.043*CL
1.352 + 0.032*CL
0.660 + 0.000*CL
1.160 + 0.043*CL
1.391 + 0.032*CL
0.687 + 0.000*CL
Group2*
1.275 + 0.041*CL
1.570 + 0.028*CL
0.660 + 0.000*CL
1.276 + 0.041*CL
1.609 + 0.028*CL
0.687 + 0.000*CL
Group3*
1.315 + 0.040*CL
1.746 + 0.025*CL
0.660 + 0.000*CL
1.315 + 0.040*CL
1.785 + 0.025*CL
0.687 + 0.000*CL
TN to PAD
tF
tPHL
tPLZ
tF
tPHL
tPLZ
EN to PAD
*Group1 : CL < 50,   *Group2 : 50 =