
Samsung ASIC
4-55
STD130
PvODyz
Open Drain Output Buffers
Switching Characteristics
(Typical process, 25
°
C, 1.8V, 3.3V, t
R
/t
F
=0.15ns, CL: Capacitive Load[pF])
PHOD4SM
PHOD8SM
PHOD12SM
Path
Parameter
Delay [ns]
CL = 50.0pF
8.668
5.832
0.757
8.668
5.930
0.832
<
Delay Equations [ns]
Group1*
0.586 + 0.162*CL
1.526 + 0.086*CL
0.757 + 0.000*CL
0.586 + 0.162*CL
1.624 + 0.086*CL
0.832 + 0.000*CL
Group2*
0.555 + 0.162*CL
1.526 + 0.086*CL
0.757 + 0.000*CL
0.555 + 0.162*CL
1.624 + 0.086*CL
0.832 + 0.000*CL
Group3*
0.539 + 0.162*CL
1.528 + 0.086*CL
0.757 + 0.000*CL
0.539 + 0.162*CL
1.623 + 0.086*CL
0.832 + 0.000*CL
TN to PAD
tF
tPHL
tPLZ
tF
tPHL
tPLZ
EN to PAD
*Group1 : CL < 50, *Group2 : 50 =
Path
Parameter
Delay [ns]
CL = 50.0pF
4.437
3.809
0.906
4.437
3.906
0.981
<
Delay Equations [ns]
Group1*
0.492 + 0.079*CL
1.640 + 0.043*CL
0.905 + 0.000*CL
0.492 + 0.079*CL
1.737 + 0.043*CL
0.981 + 0.000*CL
Group2*
0.439 + 0.080*CL
1.654 + 0.043*CL
0.906 + 0.000*CL
0.439 + 0.080*CL
1.751 + 0.043*CL
0.981 + 0.000*CL
Group3*
0.395 + 0.081*CL
1.656 + 0.043*CL
0.906 + 0.000*CL
0.395 + 0.081*CL
1.754 + 0.043*CL
0.980 + 0.000*CL
TN to PAD
tF
tPHL
tPLZ
tF
tPHL
tPLZ
EN to PAD
*Group1 : CL < 50, *Group2 : 50 =
Path
Parameter
Delay [ns]
CL = 50.0pF
3.222
3.423
1.085
3.222
3.520
1.160
<
Delay Equations [ns]
Group1*
0.669 + 0.051*CL
1.860 + 0.031*CL
1.084 + 0.000*CL
0.669 + 0.051*CL
1.957 + 0.031*CL
1.160 + 0.000*CL
Group2*
0.638 + 0.052*CL
1.941 + 0.030*CL
1.085 + 0.000*CL
0.638 + 0.052*CL
2.038 + 0.030*CL
1.160 + 0.000*CL
Group3*
0.589 + 0.052*CL
1.987 + 0.029*CL
1.085 + 0.000*CL
0.589 + 0.052*CL
2.084 + 0.029*CL
1.160 + 0.000*CL
TN to PAD
tF
tPHL
tPLZ
tF
tPHL
tPLZ
EN to PAD
*Group1 : CL < 50, *Group2 : 50 =