
STD130
4-36
Samsung ASIC
PvOByz
Normal Output Buffers
Switching Characteristics
(Typical process, 25
°
C, 1.8V, 3.3V, t
R
/t
F
=0.15ns, CL: Capacitive Load[pF])
PHOB12
PHOB16
PHOB20
PHOB24
Path
Parameter
Delay [ns]
 CL = 50.0pF
3.190
2.905
2.375
2.127
 < 
Delay Equations [ns]
Group1*
0.336 + 0.057*CL
0.247 + 0.053*CL
0.989 + 0.028*CL
0.721 + 0.028*CL
Group2*
0.300 + 0.058*CL
0.211 + 0.054*CL
0.993 + 0.028*CL
0.707 + 0.028*CL
Group3*
0.274 + 0.058*CL
0.194 + 0.054*CL
0.994 + 0.028*CL
0.697 + 0.029*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50,   *Group2 : 50 = 
Path
Parameter
Delay [ns]
 CL = 50.0pF
2.385
2.196
1.881
1.791
 < 
Delay Equations [ns]
Group1*
0.237 + 0.043*CL
0.227 + 0.039*CL
0.843 + 0.021*CL
0.748 + 0.021*CL
Group2*
0.212 + 0.043*CL
0.191 + 0.040*CL
0.845 + 0.021*CL
0.733 + 0.021*CL
Group3*
0.196 + 0.044*CL
0.163 + 0.040*CL
0.846 + 0.021*CL
0.721 + 0.021*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50,   *Group2 : 50 = 
Path
Parameter
Delay [ns]
 CL = 50.0pF
1.949
1.800
1.748
1.633
 < 
Delay Equations [ns]
Group1*
0.260 + 0.034*CL
0.271 + 0.031*CL
0.910 + 0.017*CL
0.822 + 0.016*CL
Group2*
0.230 + 0.034*CL
0.226 + 0.031*CL
0.917 + 0.017*CL
0.800 + 0.017*CL
Group3*
0.206 + 0.035*CL
0.190 + 0.032*CL
0.919 + 0.017*CL
0.784 + 0.017*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50,   *Group2 : 50 = 
Path
Parameter
Delay [ns]
 CL = 50.0pF
1.675
1.559
1.685
1.558
 < 
Delay Equations [ns]
Group1*
0.293 + 0.028*CL
0.334 + 0.025*CL
0.972 + 0.014*CL
0.899 + 0.013*CL
Group2*
0.262 + 0.028*CL
0.277 + 0.026*CL
0.989 + 0.014*CL
0.880 + 0.014*CL
Group3*
0.234 + 0.029*CL
0.235 + 0.026*CL
0.995 + 0.014*CL
0.858 + 0.014*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50,   *Group2 : 50 =