
STD130
3-268
Samsung ASIC
FD7S/FD7SD2
D Flip-Flop with Negative Edge Trigger, Set, Scan, 1X/2X Drive
Switching Characteristics
FD7S
(Typical process, 25
°
C, 1.8V, t
R
/t
F
= 0.15ns, SL: Standard Load)
FD7SD2
Path
Parameter
Delay [ns]
SL = 2
0.081
0.068
0.258
0.236
0.086
0.272
0.087
0.068
0.300
0.316
0.080
0.152
<
Delay Equations [ns]
Group1*
0.040 + 0.021*SL
0.035 + 0.017*SL
0.237 + 0.010*SL
0.214 + 0.011*SL
0.047 + 0.020*SL
0.250 + 0.011*SL
0.048 + 0.020*SL
0.035 + 0.017*SL
0.278 + 0.011*SL
0.294 + 0.011*SL
0.044 + 0.018*SL
0.127 + 0.012*SL
Group2*
0.039 + 0.021*SL
0.036 + 0.016*SL
0.240 + 0.010*SL
0.219 + 0.010*SL
0.043 + 0.021*SL
0.255 + 0.010*SL
0.042 + 0.021*SL
0.038 + 0.016*SL
0.283 + 0.010*SL
0.300 + 0.010*SL
0.048 + 0.017*SL
0.134 + 0.011*SL
Group3*
0.033 + 0.022*SL
0.032 + 0.017*SL
0.241 + 0.010*SL
0.222 + 0.009*SL
0.037 + 0.021*SL
0.256 + 0.010*SL
0.039 + 0.021*SL
0.030 + 0.017*SL
0.286 + 0.010*SL
0.303 + 0.009*SL
0.049 + 0.017*SL
0.142 + 0.010*SL
CKN to Q
tR
tF
tPLH
tPHL
tR
tPLH
tR
tF
tPLH
tPHL
tF
tPHL
SN to Q
CKN to QN
SN to QN
*Group1 : SL < 4, *Group2 : =
Path
Parameter
Delay [ns]
SL = 2
0.062
0.055
0.262
0.239
0.071
0.300
0.069
0.056
0.327
0.340
0.067
0.153
<
Delay Equations [ns]
Group1*
0.042 + 0.010*SL
0.037 + 0.009*SL
0.249 + 0.006*SL
0.225 + 0.007*SL
0.051 + 0.010*SL
0.287 + 0.006*SL
0.048 + 0.011*SL
0.039 + 0.008*SL
0.314 + 0.007*SL
0.326 + 0.007*SL
0.049 + 0.009*SL
0.138 + 0.008*SL
Group2*
0.040 + 0.010*SL
0.039 + 0.008*SL
0.254 + 0.005*SL
0.231 + 0.005*SL
0.050 + 0.010*SL
0.292 + 0.005*SL
0.050 + 0.010*SL
0.040 + 0.008*SL
0.319 + 0.005*SL
0.332 + 0.005*SL
0.051 + 0.008*SL
0.145 + 0.006*SL
Group3*
0.035 + 0.011*SL
0.037 + 0.008*SL
0.257 + 0.005*SL
0.239 + 0.005*SL
0.041 + 0.011*SL
0.298 + 0.005*SL
0.045 + 0.010*SL
0.039 + 0.008*SL
0.327 + 0.005*SL
0.341 + 0.005*SL
0.052 + 0.008*SL
0.157 + 0.005*SL
CKN to Q
tR
tF
tPLH
tPHL
tR
tPLH
tR
tF
tPLH
tPHL
tF
tPHL
SN to Q
CKN to QN
SN to QN
*Group1 : SL < 4, *Group2 : =