
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
537
Symbol
Description
Min
Max
Units
THTOHFP
TOHFP output hold time to TSLDCLK rising edge
1
ns
FTLDCLK
TLDCLK Frequency
576
KHz
TSTLD
TLD Set-up time to TLDCLK rising edge
50
ns
THTLD
TLD Hold time to TLDCLK rising edge
250
ns
TSTOHFP
TOHFP output setup time to TLDCLK rising edge
4
ns
THTOHFP
TOHFP output hold time to TLDCLK rising edge
1
ns
Figure 54 Transmit DCC Input/Output Timing
TSLDCLK1-4
TSLD1-4
TOHFP1-4
tH
TSLD
tS
TOHFP
tH
TOHFP
tS
TSLD
TLDCLK1-4
TLD1-4
TOHFP1-4
tH
TLD
tS
TOHFP
tH
TOHFP
tS
TLD
Notes on Input Timing:
1. When a set-up time is specified between an input and a clock, the set-up time is the time in
nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of the clock.
2. When a hold time is specified between an input and a clock, the hold time is the time in nanoseconds
from the 1.4 Volt point of the clock to the 1.4 Volt point of the input.
23.9
Receive Ring Control Port Timing
Table 37 RRCP Timing
Symbol
Description
Min
Max
Units
FRRCPCLK
RRCPCLK Frequency : RRCPCLK is nominally 20.736 MHz
and is generated by gapping an internal 25.92 MHz transmit
line clock
20.736
MHz
TPRRCPDAT
RRCPCK falling edge to RRCPDAT1-4 valid
-3
8
ns
TPRRCPFP
RRCPCK falling edge to RRCPFP valid
-3
8
ns