
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
498
PAISPTR alarms are declared according to Equation 2. PAISPTRCFG[1:0] bits exist for each
path. A path AIS defect is declared when the selected Equation 2 is true. A path AIS defect is
removed when the selected Equation 2 is false. An interrupt is generated when a PAISPTR
defect is declared and also when a PAISPTR defect is removed. For slave slices in concatenated
payloads, the PAISPTRCFG[1:0] should be left at 00b.
Equation 2:
PAISPTRCFG[1:0]
PAISPTR
“00”
PAIS
“01”
PAIS or PAISC
“10”
PAIS and ALLPAISC
Others
‘0’
PLOPTR alarms are declared according to Equations 3 and 4. A path LOP defect is declared
when the selected Equation 4 is true. A path LOP defect is removed when the selected Equation
4 is false. An interrupt is generated when a PLOPTR defect is declared and also when a
PLOPTR defect is removed. PLOPPTRCFG[1:0] bits exist for each path. Optionally, a
PLOPTR defect can be terminated by a PAISPTR defect. The PLOPTREND bit is a register
configuration bit that defines if PLOPTR is terminated by PAISPTR or not. A PLOPTREND bit
exists for each path. When the PLOPTR is terminated by PAISPTR and this PAISPTR is true
the PLOPTR is forced false, in any others case it takes PLOPTR_NOEND value. For slave
slices in concatenated payloads, the PLOPTRCFG[1:0] should be left at 00b.
Equation 3:
PLOPTRCFG[1:0]
PLOPTR_NOEND
“00”
PLOP
“01”
PLOP or PLOPC
“10”
PLOP or PLOPC or PAIS or PAISC
Others
‘0’
Equation 4:
PLOPTREND
PAISPTR
PLOPTR
‘0’
Don’t care
PLOPTR_NOEND
‘0’
PLOPTR_NOEND
‘1’
‘1’
‘0’
The receive RPALM indication is defined by Equation 5. The bits from and including
RSALMEN to PTIMEN in the Indirect Register 1H: SARC Path RPALM Enable Indirect Data
(48 path) are register configuration bits that individually enable or disable each defect. The bits
exist for each path. The RPALM is indicated on chip output RALM.