
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
423
Indirect Register 00H: THPP_R Control Register (TCR)
Bit
Type
Function
Default
Bit 15
Unused
Bit 14
Unused
Bit 13
Unused
Bit 12
Unused
Bit 11
Unused
Bit 10
Unused
Bit 9
Unused
Bit 8
Unused
Bit 7
R/W
Reserved
0
Bit 6
R/W
Reserved
0
Bit 5
R/W
TDIS
0
Bit 4
Unused
Bit 3
R/W
FSBEN
0
Bit 2
R/W
PREIEBLK
0
Bit 1
R/W
EXCFS
0
Bit 0
Unused
The THPP_R Control Indirect Register is provided at THPP_R r/w indirect address 00H.
EXCFS
When EXCFS is set to logic 1, the fixed stuff columns in the STS-1 SPE/VC-3 format are
excluded from BIP calculations. When EXCFS is set to logic 0, the fixed stuff columns in
the STS-1 SPE/VC-3 format are included in the BIP calculations.
PREIEBLK
When PREIEBLK is set to logic 1, the path REI value extracted on the PREI[3:0] input bus
represents BIP-8 block errors, i.e. the REI-P value allowed in G1 is either 0 or 1. When
PREIEBLK is set to logic 0, the path REI value extracted on the PREI[3:0] input bus
represents BIP-8 errors, i.e.the REI-P value allowed in G1 is from 0 to 8.
FSBEN
When FSBEN is set logic one, THPP_R overwrites the fixed stuff byte on PIN[7:0] with the
value found in TFSB. When FSBEN is set to logic zero, the fixed stuff byte value on
PIN[7:0] is transparently passed through.