
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
451
Register 2109H 2111H 2119H 2121H 2129H 2131H 2139H 2141H 2149H 2151H 2159H and
2161H: SHPI Pointer Interpreter Interrupt Enable
Bit
Type
Function
Default
Bit 15
Unused
X
Bit 14
Unused
X
Bit 13
Unused
X
Bit 12
Unused
X
Bit 11
Unused
X
Bit 10
Unused
X
Bit 9
Unused
X
Bit 8
Unused
X
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
R/W
PAISCE
0
Bit 4
R/W
PLOPCE
0
Bit 3
R/W
PAISE
0
Bit 2
R/W
PLOPE
0
Bit 1
Unused
X
Bit 0
R/W
PTRJEE
0
The Pointer Interpreter Interrupt Enable Register is provided at SHPI Read/Write Address
2109H 2111H 2119H 2121H 2129H 2131H 2139H 2141H 2149H 2151H 2159H and 2161H.
PTRJEE
The pointer justification event interrupt enable (PTRJEE) bit control the activation of the
interrupt (INTB) output. When PTRJEE is set to logic 1, the NJEI and PJEI pending
interrupt will assert the interrupt (INTB) output. When PTRJEE is set to logic 0, the NJEI
and PJEI pending interrupt will not assert the interrupt (INTB) output.
PLOPE
The path loss of pointer interrupt enable (PLOPE) bit controls the activation of the interrupt
(INTB) output. When PLOPE is set to logic 1, the PLOPI pending interrupt will assert the
interrupt (INTB) output. When PLOPE is set to logic 0, the PLOPI pending interrupt will
not assert the interrupt (INTB) output.
PAISE
The path alarm indication signal interrupt enable (PAISE) bit controls the activation of the
interrupt (INTB) output. When PAISE is set to logic 1, the PAISI pending interrupt will
assert the interrupt (INTB) output. When PAISE is set to logic 0, the PAISI pending
interrupt will not assert the interrupt (INTB) output.