
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
364
This bit is only valid for master slices.
HMASKEN
The H1/H2 mask enable (HMASKEN) bit selects the use of the H1/H2 bytes extracted from
the TTOH port. When HMASKEN is set to logic 1, the H1/H2 bytes extracted from the
TTOH port are used as a mask to toggle bits in the H1/H2 path payload pointer bytes (the
H1/H2 bytes extracted from the TTOH port are XOR with the path payload pointer bytes).
When HMASKEN is set to logic 0, the H1/H2 bytes extracted from the TTOH port are
inserted instead of the internally generated path payload pointer bytes.
This bit is only valid for master slices.
A1ERR
The A1 error insertion (A1ERR) bit is used to introduce framing errors in the A1 bytes.
When A1ERR is set to logic 1, 76h instead of F6h is inserted in all of the A1 bytes of the
STS-12/STM-4 #1 according to the priority of Table 10. When A1ERR is set to logic 0, no
framing errors are introduced.
This bit is only valid for master slices.
LRDIINS
The line RDI insertion (LRDIINS) bit is used to force a line remote defect indication in the
data stream. When LRDIINS is set to logic 1, the 110 pattern is inserted in bits 6, 7 and 8
of the K2 byte of STS-1/STM-0 #1 to force a line RDI condition. When LRDIINS is set to
logic 0, the line RDI condition is removed.
This bit is only valid for master slices.
LAISINS
The line AIS insertion (LAISINS) bit is used to force a line alarm indication signal in the
data stream. When LAISINS is set to logic 1, all ones are inserted in the line overhead and
in the payload (all the bytes of the frame except the section overhead bytes) to force a line
AIS condition. When LAISINS is set to logic 0, the line AIS condition is removed. Line
AIS is inserted/removed on frame boundary before scrambling.
This bit is valid for master and slave slices.