
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
355
Register 2050H: TRMP Configuration
Bit
Type
Function
Default
Bit 15
Unused
X
Bit 14
Unused
X
Bit 13
Unused
X
Bit 12
Unused
X
Bit 11
R/W
LREIBLK
0
Bit 10
R/W
LREIEN
1
Bit 9
R/W
APSEN
1
Bit 8
R/W
TLDTS
1
Bit 7
R/W
TLDEN
0
Bit 6
R/W
TSLDSEL
0
Bit 5
R/W
TSLDTS
1
Bit 4
R/W
TSLDEN
0
Bit 3
R/W
TRACEEN
0
Bit 2
R/W
J0Z0INCEN
0
Bit 1
R/W
Z0DEF
0
Bit 0
R/W
A1A2EN
1
The TRMP Configuration register controls the transmit regenerator and Multiplexer functions.
These register bits are valid for both master and slave slices. Please refer to individual bit for
details.
A1A2EN
The A1A2 framing enable (A1A2EN) bit controls the insertion of the framing bytes in the
data stream. When A1A2EN is set to logic 1, F6h and 28h are inserted in the A1 and A2
bytes according to the priority of Table 10. When A1A2EN is set to logic 0, the framing
bytes are not inserted.
This bit is valid for master and slave slices. For normal operation, this bit should be set to
logic one for both master and slave slices.
Z0DEF
The Z0 definition (Z0DEF) bit defines the Z0 growth bytes. When Z0DEF is set to logic 0,
the Z0 bytes are defined according to TELCORDIA. The Z0 bytes are located in STS-
1/STM-0 #2 to #192 in STM64 mode and in STS-1/STM-0 # 2 to 48 in Quad STM-16
mode.