
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
196
Register 006EH: Four Bytes De-Interleaver (FBDI) Control
Bit
Type
Function
Default
Bit 15
Unused
Bit 14
Unused
Bit 13
Unused
Bit 12
Unused
Bit 11
Unused
Bit 10
Unused
Bit 9
Unused
Bit 8
Unused
Bit 7
Unused
Bit 6
Unused
Bit 5
Unused
Bit 4
Unused
Bit 3
R/W
FBDIEN4
1
Bit 2
R/W
FBDIEN3
1
Bit 1
R/W
FBDIEN2
1
Bit 0
R/W
FBDIEN1
1
The Four Bytes De-Interleaver control Register is provided at SRLI_192 Read/Write Address
EH.
FBDIEN1-4
The FBDI enable (FBDIEN1-4) bit controls the Four-Byte De-Interleaver (FBDI) block.
When FBDIENx is set to logic 1, the FBDI block is active and the bytes on the SRLI
output bus are de-interleaved. When FBDIENx is set to logic 0, the FBDI block is inactive.
When used in STS-192 (STM-64), only FBDIEN1 is valid and FBDIEN2-4 are ignored.
15.4 SBER Normal Registers
There are 4 SBER (#1 - #4) blocks in 4 STM-16 processing groups with independent register
sets. When the SPECTRA-9953 is configured for quad STS-48/STM-16 mode, all four blocks
are configured as masters to process the STS-48c/STM-16c data streams. When configured for
STS-192/STM-64 mode, only SBER#1 is configured as master and the other three (#2 - #4)