
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
176
LAIS3
The line alarm indication signal detection (LAIS3) bit selects the Line AIS detection
algorithm. When LAIS3 is set to logic 1, Line AIS is declared when a 111 pattern is
detected in bits 6,7,8 of the K2 byte for three consecutive frames. When LAIS3 is set to
logic 0, Line AIS is declared when a 111 pattern is detected in bits 6,7,8 of the K2 byte for
five consecutive frames.
LRDI3
The line remote defect indication detection (LRDI3) bit selects the Line RDI detection
algorithm. When LRDI3 is set to logic 1, Line RDI is declared when a 110 pattern is
detected in bits 6,7,8 of the K2 byte for three consecutive frames. When LRDI3 is set to
logic 0, Line RDI is declared when a 110 pattern is detected in bits 6,7,8 of the K2 byte for
five consecutive frames.
RSLDTS
The RSLD tri-state control (RSLDTS) bit controls the RSLDCLK and RSLD output ports.
When RSLDTS is set to logic 1, the RSLDCLK and RSLD output ports are tri-state. When
RSLDTS is set to logic 0, the RSLDCLK and RSLD output ports are enabled.
RSLDSEL
The receive section line data communication channel select (RSLDSEL) bit selects the
contents of the RSLD serial output and the frequency of the RSLDCLK clock.
RSLDSEL
Contents
RSLDCLK
0
Section DCC (D1-D3)
Nominal 192 kHz
1
Line DCC (D4-D12)
Nominal 576 kHz
RLDTS
The RLD tri-state control (RLDTS) bit controls the RLDCLK and RLD output ports. When
RLDTS is set to logic 1, the RLDCLK and RLD output ports are tri-state. When RLDTS is
set to logic 0, the RLDCLK and RLD output ports are enabled.