
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
162
Register 001DH: Line Side Analog Control
Bit
Type
Function
Default
Bit 15
R/W
Unused
0
Bit 14
R/W
Unused
0
Bit 13
R/W
Unused
0
Bit 12
R/W
Unused
0
Bit 11
R/W
Unused
0
Bit 10
R/W
Unused
0
Bit 9
R/W
Unused
0
Bit 8
R/W
RESERVED
0
Bit 7
R/W
Line_ACPENB
0
Bit 6
R/W
Line_ACEN
0
Bit 5
R/W
Line_AENB
0
Bit 4
R/W
RESERVED
0
Bit 3
R/W
RESERVED
0
Bit 2
R/W
RESERVED
0
Bit 1
R/W
RESERVED
0
Bit 0
R/W
Line_ARST
0
This register provides some control bits for the line side analog circuitry. This register is used
for diagnostic purposes only.
Line_ARST
Line OIF interface analog reset . When high , the line interface is held in reset. For normal
operation, this bit must be set to 0
Line_AENB
OIFs interface enable bar. When low, the OIF line interface is enabled. For normal
operation, this bit must be set to 0. When the OIF line interface is disabled, its clocks are
not guaranteed and may currupt some indirect registers in the RHPP, THPP and TSVCA. In
such a case, the entire device should be reset or the four slices reset in order to clear any
currupt values on the registers. Alternately, the affected registers can be reprogrammed.
Line_ACEN
OIFs analog interface chopper clock enable. When high, offset correction circuitry is
enabled.