
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
298
Indirect Register 0H: SARC Path Configuration Indirect Data (48 path)
Bit
Type
Function
Default
Bit 15
Unused
Bit 14
Unused
Bit 13
Unused
Bit 12
Unused
Bit 11
Unused
Bit 10
Unused
Bit 9
Unused
Bit 8
Unused
Bit 7
R/W
RDIEN
0
Bit 6
R/W
PERDI22
0
Bit 5
R/W
TPRCPEN
0
Bit 4
R/W
PLOPTREND
0
Bit 3
R/W
PAISPTRCFG[1]
0
Bit 2
R/W
PAISPTRCFG[0]
0
Bit 1
R/W
PLOPTRCFG[1]
0
Bit 0
R/W
PLOPTRCFG[0]
0
This register is indirect 48 times for 48 paths.
PLOPTRCFG[1:0]
The path loss of pointer configuration (PLOPTRCFG[1:0]) bits define the LOP-P defect.
When PLOPTRCFG[1:0] is set to
00b
, an LOP-P defect is declared when the pointer is in
the LOP state and an LOP-P defect is removed when the pointer is not in the LOP state.
When PLOPTRCFG[1:0] is set to
01b
, an LOP-P defect is declared when the pointer or any
of the concatenated pointers is in the LOP state and an LOP-P defect is removed when the
pointer and all the concatenation pointers are not in the LOP state. When
PLOPTRCFG[1:0] is set to
10b
, an LOP-P defect is declared when the pointer or any of the
concatenated pointers is in the LOP state or in the AIS state and an LOP-P defect is
removed when the pointer and all the concatenation pointers are not in the LOP state or in
the AIS state. For slave STS-1/STM0 slices, the PLOPTRCFG[1:0] bits should be left at
00b
; otherwise, LOP-P could be declared unexpectedly on non-master timeslots.