
MOTOROLA
4-4
ON-CHIP MEMORY
M68HC11
REFERENCE MANUAL
implies using caution whenever there is more than one power supply in a system. Al-
though the sequencing of V
DD
relative to MODB/V
STBY
is not important on the
MC68HC11A8 itself, the sequencing may be important to any other CMOS device in
the system exposed to both V
DD
and V
STBY
.
Several I/O pins on the MCU should not have voltage on them while V
DD
is off. Any
pin having the source or drain node of a P-channel device in the on-chip circuitry con-
nected to this pin has an inherent diode to V
DD
. If such a pin were connected to a sig-
nal powered by V
STBY
rather than V
DD
, the entire V
DD
network would be powered by
V
STBY
through the inherent diode. Powering the V
DD
network in this way may result in
unexpected operation of the system and definitely results in more load on the V
STBY
supply than expected.
4.3 EEPROM
The MC68HC11A8 was the first MCU to include CMOS EEPROM. This 512-byte EE-
PROM memory can be used in the same ways ROM would be used, but some inter-
esting possibilities arise that are not possible with ROM or RAM memories. A simple
example is to store a unique serial number in the EEPROM of each finished product.
Once information is programmed into the on-chip EEPROM, it remains unchanged
even if V
DD
power is removed indefinitely. Unlike information in ROM, information in
EEPROM can be erased or reprogrammed under software control. Since EEPROM
programming and erasure operations use an on-chip charge pump driven by V
DD
, no
special power supplies are needed.
This subsection describes the operation of the EEPROM on the MC68HC11A8 and
explores some of its applications. In addition to the 512 bytes of user EEPROM on the
MC68HC11A8, there is another EEPROM byte (CONFIG register) controlling some
basic features of the MCU. The CONFIG register and mechanism are described in de-
tail in
3.2 EEPROM-Based CONFIG Register
, but some aspects of the EEPROM en-
able bit (EEON), and the security mode disable bit (NOSEC) will be discussed in terms
of how they relate to EEPROM.
The M68HC11 Family of MCUs includes members with various amounts of EEPROM.
The MC68HC811A8 (emulator for the basic MC68HC11A8) has 8.5 Kbytes of EE-
PROM. The principles presented here apply specifically to the original MC68HC11A8.
Some details of EEPROM operation may vary slightly for other members of the
M68HC11 Family; however, the basic concepts presented here can be extended to
explain the operation of these other members.
4.3.1 Logical and Physical Organization
The logical organization of the 512-byte EEPROM is important for identification of
rows when using the row-erase feature. The physical organization may be useful in
isolating problems in rare cases.
Although some Family members (e.g., MC68HC811E2) allow remapping of the on-
chip EEPROM, the 512-byte EEPROM in the MC68HC11A8 is fixed at locations
$B600–$B7FF. This 512-byte block is logically arranged into 32 rows of 16 bytes each.
The first row occupies the locations $B600–$B60F, the second row occupies $B610–