MOTOROLA
2-24
PINS AND CONNECTIONS
M68HC11
REFERENCE MANUAL
and still be expected to work properly as the battery voltage slowly decays to some
level well below 5 V. Although the MC68HC11A8 could be used in such an application,
published specifications do not cover this range of V
DD
.
2.4.1 Zap and Latchup
Zap and latchup are terms familiar to failure analysis engineers that work on CMOS
integrated circuits. Zap refers to damage caused by very high-voltage static-electricity
exposure. Static-electricity (zap) damage usually appears as breakdown of the rela-
tively thin oxide layers that causes leakage or shorts. Often secondary damage occurs
after an initial zap failure causes a short.
Latchup refers to a usually catastrophic condition caused by turning on an unintention-
al, bipolar, silicon-controlled rectifier (SCR). A latchup SCR is formed by N and P re-
gions in the layout of the integrated circuit, which act as the collector, base, and
emitters of unintentional, parasitic transistors. Bulk resistance of silicon in the wells
and substrate act as resistors in the SCR circuit. Application of voltages above V
DD
or
below V
SS
, in conjunction with enough current to develop voltage drops across the
parasitic resistors in the unintentional SCR circuit, can cause the SCR to turn on. Once
this SCR is turned on, it can normally only be turned off by removing all power from
the integrated circuit. The on-impedance of the SCR can overheat and destroy the in-
tegrated circuit.
Improvements in layout and processing techniques have made newer HCMOS devic-
es, such as the MC68HC11A8, much less likely to suffer damage from zap and latch-
up. Because of the destructive nature of these mechanisms, it is impossible to test
every device for zap and latchup limits the way timing and drive levels are tested. To
assure product reliability, sample groups of devices are destructively tested.
2.4.2 Protective Interface Circuits
In applications where MCU pins might be exposed to detrimental conditions, protective
interfaces may be needed to protect the MCU from damage. The two main goals of
any protective interface are to prevent high currents from flowing and to prevent illegal
voltage levels at a pin. A low-pass filter can often satisfy both goals. In less common
situations, it may also be necessary to provide diode clamps to prevent high voltages
at some pins. All pins on the M68HC11 have internal inherent diode clamps to V
SS
,
but only some of the pins include clamps to V
DD
. The following subsections discuss
the internal circuits for each type MCU pin and note special considerations for the pro-
tection of these pin types.
Usually, the only pins needing protection are those that are exposed to signals from
outside the system. For example, in an automobile engine controller, the sensors for
air and fuel flow are connected to the engine control module and ultimately to MCU
inputs. These signals are prime candidates for protective interfaces because noise or
illegal levels could accidentally be applied through the interface wiring. On the other
hand, any buses and signals wholly contained within the control module probably do
not require any sort of protective interface because there is little chance that these sig-
nals would be exposed to illegal levels. In a few cases, a protective interface can even