M68HC11
REFERENCE MANUAL
CENTRAL PROCESSING UNIT
MOTOROLA
6-9
which is a backward reference, enabled the assembler to know the symbol value when
processing the statement, and the assembler selected the direct addressing mode.
The last reference to CAT is also a backward reference to a symbol in the direct ad-
dressing area, but the extended addressing mode was selected because there is no
direct addressing mode variation of that particular instruction. Some assemblers allow
the direct or extended addressing modes to be forced (by preceding the operand field
with < or >, respectively), even when other conditions would suggest the other mode.
6.2.4 Indexed (INDX, INDY)
In the indexed addressing mode, either index register X or Y is used in calculating the
effective address. In this case, the effective address is variable and depends on the
current contents of index register X or Y and a fixed, 8-bit, unsigned offset contained
in the instruction. This addressing mode can be used to reference any memory loca-
tion in the 64-Kbyte address space. These instructions are usually two or three bytes
(if prebyte is required) — the opcode and the 8-bit offset.
In microprocessor-based systems, instructions usually reside in read-only memory
(ROM). Therefore, the offset in the instruction should be considered a fixed value that
is determined at assembly time rather than during program execution. The use of dy-
namic single-byte offsets is facilitated with the use of the add accumulator B to index
register X (ABX) instruction. More complex address calculations are aided by the arith-
metic capability of the 16-bit accumulator D and the XGDX and XGDY instructions.
If no offset is specified or desired, the machine code will contain $00 in the offset byte.
The offset is an unsigned single-byte value that, when added to the current value in
the index register, yields the effective address of the operand, leaving the index regis-
ter unchanged. Because the offset byte is unsigned, only positive offsets in the range
0–255 can be specified. To use the indexed addressing mode to access on-chip reg-
isters in the MC68HC11A8, it is best to initialize the index register to the starting ad-
dress of the register block (usually $1000) and use an 8-bit offset ($00–$3F) in the
instructions that access registers. This method is preferred over loading the index reg-
ister with the 16-bit address of a register and then specifying a zero offset in the in-
struction. This latter method requires modification of the index register for each
register access; whereas, the former method does not.
Examples of the indexed addressing mode are shown (EA indicates effective ad-
dress):
Machine Code
E3 00
E3 00
E3 00
Label
Operation
ADDD
ADDD
ADDD
Operand
X
,X
0,X
Comments
EA=(X)
EA=(X)
EA=(X)
E3 04
ADDD
EQU
ADDD
ADDD
ADDD
4,X
7
CAT,X
$22,X
CAT*8/2+6,X
EA=(X)+4
DEFINE CAT=7
EA=(X)+7
EA=(X)+$22
EA=(X)+(CAT*8
÷
2+6)
CAT
E3 07
E3 22
E3 22
Bit-manipulation instructions support direct and indexed addressing modes but not ex-