
M68HC11
REFERENCE MANUAL
MAIN TIMER AND REAL-TIME INTERRUPT
MOTOROLA
10-1
SECTION 10
MAIN TIMER AND REAL-TIME INTERRUPT
This section describes the main timer system of the MC68HC11A8. Because the
clocking chains associated with the real-time interrupt and computer operating prop-
erly (COP) watch dog timer branch off the main timer counter, these timing functions
are also discussed in this section. All major clock divider chains in the microcontroller
unit (MCU) are illustrated from the oscillator to the serial baud-rate generators, which
helps put the timer counter chain in context with the rest of the MCU system.
Since the architecture of the main timer is primarily a software-driven system, several
application examples are included throughout this section. Some examples demon-
strate how to measure pulse widths and frequencies. Other examples demonstrate
techniques for controlling timer output signals. Still other examples depict how output
compares can be used for software timing.
10.1 General Description
This timer system is based on a free-running 16-bit counter with a four-stage program-
mable prescaler. A timer overflow function allows software to extend the timing capa-
bility of the system beyond the 16-bit range of the counter. Three independent input-
capture functions are used to automatically record (latch) the time when a selected
transition is detected at a respective timer input pin. Five output-compare functions are
included for generating output signals or for timing software delays. Since the input-
capture and output-compare functions may not be familiar to all users, these concepts
are explained in greater detail.
A programmable periodic interrupt circuit called the real-time interrupt (RTI) is tapped
off of the main 16-bit timer counter. Software can select one of four rates for the RTI,
which is most commonly used to pace the execution of software routines.
The computer operating properly (COP) watchdog function is loosely related to the
main timer in that the clock input to the COP system (E
÷
2
15
) is tapped off the free-
running counter chain. The clocking structure for this system will be discussed briefly
in this section, but the overall COP system is explained in greater detail in
SECTION
5 RESETS AND INTERRUPTS
.
The timer subsystem involves more registers and control bits than any other sub-
system on the MCU. Each of the three input-capture functions has its own 16-bit time
capture latch (input-capture register) and each of the five output-compare functions
has its own 16-bit compare register. All timer functions, including the timer overflow
and RTI have their own interrupt controls and separate interrupt vectors. Additional
control bits permit software to control the edge(s) that trigger each input-capture func-
tion and the automatic actions that result from output-compare functions. Although
hardwired logic is included to automate many timer activities, this timer architecture is
essentially a software-oriented system. This structure is easily adaptable to a very