
M68HC11
REFERENCE MANUAL
PINS AND CONNECTIONS
MOTOROLA
2-23
minating pins that can be configured for input or output is with individual pull-up or
pulldown resistors for each unused pin. Some users leave these pins unconnected
and reconfigure them as outputs during initialization. There is still a brief period during
reset and initialization where these pins are unterminated inputs. There is also a small
risk that a defective system might fail to reconfigure these pins as outputs. A pin ca-
pable of being configured as an output should never be connected to another such pin
or directly to either power-supply rail. If the pin ever became an output, there is a pos-
sibility of high current drain due to an output conflict.
Part of the verification procedure for the design of every MCU system should be a pin-
by-pin review of what is connected to every pin on the MCU to eliminate potential prob-
lems.
2.4 Avoidance of Pin Damage
Any integrated circuit can be damaged or destroyed by exposure to illegal voltages or
conditions. By understanding the failure mechanisms, a designer can protect against
damaging conditions. In some cases, a product can even be designed to tolerate com-
mon end-user errors by designing protective interface circuits.
The data sheets for integrated circuits state conservative limits and conditions that will
definitely protect the integrated circuit. The consequences of violating the specified
limits are not usually discussed because there are too many variables affecting the re-
sults. In some cases, the MCU can tolerate significantly worse conditions than the stat-
ed limits, although it is almost impossible to quantify or guarantee this better
performance for all parts and conditions.
There are several basic types of pin interface circuits on the MC68HC11A8. The exact
devices connected to the pin influence what happens as the voltage level at the pin is
driven above V
DD
or below V
SS
. Many other factors, including ambient temperature
and lot-to-lot process variations, also influence the reaction of the MCU to illegal volt-
age levels and conditions. The following discussion explains the conditions leading to
actual damage and what that damage might be. This information should be used as a
guideline to help engineers avoid conditions leading to possible MCU damage.
Connected to the substrate of the silicon die, the V
SS
pin is the reference point from
which all other voltages are measured. The V
DD
pin is the main positive power supply
for the MCU. Data sheet information is tested and guaranteed for V
DD
equal to 5 V
±
10 percent, but, in limited temperature range applications, the MCU can operate over
a wider range of V
DD
(some timing and drive capability specifications may not be met).
V
DD
and operating temperature have a significant effect on the speed of CMOS logic.
As V
DD
is reduced, the maximum crystal frequency must also be reduced. For V
DD
equal 5 V
±
10 percent, the MC68HC11A8 can operate with a maximum bus frequency
of 2.1 MHz; when V
DD
is 3 V, the maximum bus frequency is about 1 MHz. At low tem-
peratures, speed increases and power-supply current decreases. The MCU can typi-
cally operate with V
DD
levels up to 7 V without damaging the MCU, but timing and drive
levels will differ from the specified limits. Also, there may be some adverse effects on
gate oxides from long-term exposure to V
DD
greater than or equal to 7 V. A battery-
based application could be exposed to V
DD
greater than 5 V when batteries are new