
M68HC11
REFERENCE MANUAL
CENTRAL PROCESSING UNIT
MOTOROLA
6-3
The ABX and ABY instructions along with increment and decrement instructions allow
some arithmetic operations on the index registers, but, in some cases, more powerful
calculations are needed. The exchange instructions, XGDX and XGDY, offer a very
simple way to load an index value into the 16-bit double accumulator, which has more
powerful arithmetic capabilities than the index registers themselves.
It is very common to load one of the index registers with the beginning address of the
internal register space (usually $1000), which allows the indexed addressing mode to
be used to access any of the internal I/O and control registers. Indexed addressing re-
quires fewer bytes of object code than the corresponding instruction using extended
addressing. Perhaps a more important argument for using indexed addressing to ac-
cess register space is that bit-manipulation instructions are available for indexed ad-
dressing but not for extended addressing.
6.1.3 Stack Pointer (SP)
The M68HC11 CPU automatically supports a program stack. This stack may be locat-
ed anywhere in the 64-Kbyte address space and may be any size up to the amount of
memory available in the system. Normally, the stack pointer register is initialized by
one of the very first instructions in an application program. Each time a byte is pushed
onto the stack, the stack pointer is automatically decremented, and each time a byte
is pulled off the stack, the stack pointer is automatically incremented. At any given
time, the stack pointer register holds the 16-bit address of the next free location on the
stack. The stack is used for subroutine calls, interrupts, and for temporary storage of
data values.
When a subroutine is called by a jump to subroutine (JSR) or branch to subroutine
(BSR) instruction, the address of the next instruction after the JSR or BSR is automat-
ically pushed onto the stack (low half first). When the subroutine is finished, a return
from subroutine (RTS) instruction is executed. The RTS causes the previously stacked
return address to be pulled off the stack, and execution continues at this recovered re-
turn address.
Whenever an interrupt occurs (provided it is not masked), the current instruction fin-
ishes normally, the address of the next instruction (the current value in the program
counter) is pushed onto the stack, all of the CPU registers are pushed onto the stack,
and execution continues at the address specified by the vector for the highest priority
pending interrupt. After completing the interrupt service routine, a return from interrupt
(RTI) instruction is executed. The RTI instruction causes the saved registers to be
pulled off the stack in reverse order, and program execution resumes as if there had
been no interruption.
Another common use for the stack is for temporary storage of register values. A simple
example would be a subroutine using accumulator A. The user could push accumula-
tor A onto the stack when entering the subroutine and pull it off the stack just before
leaving the subroutine. This method is a simple way to assure a register(s) will be the
same after returning from the subroutine as it was before starting the subroutine.
The most important aspect of the stack is that it is completely automatic. A program-