M68HC11
REFERENCE MANUAL
MAIN TIMER AND REAL-TIME INTERRUPT
MOTOROLA
10-53
Listing - Timer Examples
* Produces high going PWM signals of the period and duty cycle specified
* Note actually only produces PWMs of 50% to 100% because spec’d duty of
* 0 to 50% is changed to low going PWM w/duty cyc = [100% - spec(0-50)]
*
* This program runs on an EVB board and drives output pins.
* An oscilloscope is used to study the results.
***
Sheet 10 of 16
c208 8e 00 47
c20b 86 7e
c20d 97 df
c20f ce c2 69
c212 df e0
c214 ce 10 00
c217 86 50
c219 a7 20
c21b 86 70
c21d a7 0c
c21f 5f
c220 b6 d0 03
c223 81 32
c225 23 02
c227 cb 40
c229 b6 d0 04
c22c 81 32
c22e 23 02
c230 cb 20
c232 e7 0d
[3]
[2]
[3]
[3]
[4]
[3]
[2]
[4]
[2]
[4]
[2]
[4]
[2]
[3]
[2]
[4]
[2]
[3]
[2]
[4]
INZ6
LDS
LDAA
STAA
LDX
STX
LDX
LDAA
STAA
LDAA
STAA
CLRB
LDAA
CMPA
BLS
ADDB
LDAA
CMPA
BLS
ADDB
STAB
# $0047
# $7E
PVOC1
#SV6OC1
PVOC1+1
#REGBAS
#%01010000
TCTL1,X
#%01110000
OC1M,X
Top of User’s stack area on EVB
Jump (extended) Opcode
OC1 Pseudo Vector see manual
Address of OC1 service routine
Finish JMP inst to OC1 routine
Point to register block
OMx:OLx = 0:1 for toggle
OC2 and OC3 for toggle
OC1M6,5, & 4 = 1
Control OC2/PA6, OC3/PA5, & PA4
Build OC1D initial value in B
Check for OC2 duty > or = 50%
PWMDC1
#50
ARNZ61
#%01000000
PWMDC2
#50
ARNZ62
#%00100000
OC1D,X
If<50% OC1 goes lo OC2 togls hi
else OC1 goes high OC2 togls lo
Check for OC3 duty > or = 50%
ARNZ61
I<50% OC1 goes lo OC3 togls hi
else OC1 goes hi, OC3 togls lo
Store starting value for OC1D
ARNZ62
* Calculate period & duty cycle as cycle count offsets
LDAA
PWMP1P
1% of period
LDAB
#100
MUL
100 * PWMP1P = PWMPER
STD
PWMPER
Store period
STD
TOC1,X
Start 1st PWM per @ TCNT=PWMPER
LDAA
PWMDC1
Calculate offset for OC2
BSR
CALOFF
Adj duty as req’d & calc offset
STD
TOC2,X
Schedule first OC2 toggle
LDAA
PWMDC2
Calculate offset for OC3
BSR
CALOFF
Adj duty as req’d & calc offset
STD
TOC3,X
Schedule first OC3 toggle
* Finish initialization
LDAA
# $80
STAA
TFLG1,X
OC1F=1 to clr any old OC1 flag
STAA
TMSK1,X
then OC1I=1 to enable OC1 int.
CLI
c234 b6 d0 02
c237 c6 64
c239 3d
c23a fd d0 1f
c23d ed 16
c23f b6 d0 03
c242 8d 12
c244 ed 18
c246 b6 d0 04
c249 8d 0b
c24b ed 1a
[4]
[2]
[10]
[5]
[5]
[4]
[6]
[5]
[4]
[6]
[5]
c24d 86 80
c24f a7 23
c251 a7 22
c253 0e
[2]
[4]
[4]
[2]
c254 20 fe
[3]
BRA
*
OC1 interrupt runs PWMs now