M68HC11
REFERENCE MANUAL
MOTOROLA
I-1
INDEX
–A–
A/D A/D Charge Pump
12-13
A/D Accuracy
2-18, 12-1, 12-7, 12-14, 12-17
A/D Conversion
2-27, 4-10, 7-40, 12-1, 12-13, 12-14, 12-15,
12-18
A/D Converter Reference Voltage
2-18, 2-22, 7-39
A/D Pin
2-22, 2-27, 12-17, 12-18
A/D System
2-18, 4-10, 5-3, 7-39, 12-1, 12-13, 12-14, 12-18
Accumulator
1-2, 2-19, 3-18, 4-16, 5-3, 5-12, 5-22, 5-25,
5-27, 6-1, 6-9, 6-11, 7-1, 7-7, 9-6, 10-2, 10-5, 10-6,
10-20, 10-35, 11-1, 11-2, 11-3, 11-4, 11-5, 11-6,
11-7, 11-8, 11-9, 11-11
Adaptive Algorithm
4-20
ADCTL Register (Registers)
2-3, 2-8, 2-14, 4-2, 4-7, 4-22,
5-1, 5-2, 5-22, 5-25, 5-28, 6-8, 6-13, 7-7, 7-8, 7-46,
9-1, 9-6, 9-9, 9-15, 9-29, 11-2, 11-6, 11-7, 11-11,
12-1, 12-18, 12-21
Addres Decoding
2-33
Address Line
2-33, 7-14, 7-17
Address Line 0 (Pins)
2-33, 7-17
Address Line 1 (Pins)
2-33
Address Line 14 (Pins)
2-33, 3-19
Address Line 7 (Pins)
2-20, 7-17
Address Strobe
10-6
Address Strobe (Pins)
2-18, 2-21, 3-10, 3-20, 4-15, 5-25,
6-14, 7-12, 7-23, 7-24, 9-1, 10-6
Address/Data Line 0 (Pins)
2-3, 2-8, 2-14, 4-2, 4-7, 4-22, 5-1,
5-2, 5-22, 5-25, 5-28, 6-8, 6-13, 7-7, 7-8, 7-46, 9-1,
9-6, 9-9, 9-15, 9-29, 11-2, 11-6, 11-7, 11-11, 12-1,
12-18, 12-21
Address/Data Line 7 (Pins)
2-3, 2-8, 2-14, 4-2, 4-7, 4-22, 5-1,
5-2, 5-22, 5-25, 5-28, 6-8, 6-13, 7-7, 7-8, 7-46, 9-1,
9-6, 9-9, 9-15, 9-29, 11-2, 11-6, 11-7, 11-11, 12-1,
12-18, 12-21
Address/Data Mux Bus (AD7-AD0)
2-5, 2-7, 2-20, 7-1, 7-12,
7-16
Addressing Modes
4-12, 6-1, 6-6, 6-11, 7-4
ADPU (Bit in OPTION)
3-9, 5-3, 12-13, 12-14
ADR1 (Registers)
12-15
ADR4 (Registers)
12-17
Analog Multiplexer
2-26
Arithmetic Instructions (Instructions)
6-1, 6-2, 6-3, 6-11, 6-12
AT-Cut Crystal
2-12, 2-15, 2-16
Automatic Clearing Mechanism
5-27
–B–
Baud Rate
5-3, 9-1, 9-5, 9-7, 9-18, 9-20, 9-26, 9-30
BAUD Register (Registers)
3-14
Binary-Coded Decimal (BCD)
6-2
Bit Manipulation Instructions (Instructions)
4-12, 5-27, 6-11
Block Diagram
1-2, 1-3, 2-7, 8-3, 8-4, 9-1, 9-2, 9-3, 9-4,
9-19, 9-30, 9-31, 10-2, 10-3, 11-1, 11-2, 11-3
Bootloader ROM
4-2, 5-6
Bootstrap Mode
2-8, 2-20, 2-31, 2-37, 3-18, 4-2, 4-10, 4-15,
4-18, 4-19, 5-2, 5-3, 5-6, 5-13, 5-14, 5-22, 5-23,
9-7, 10-39
Bootstrap ROM
3-2, 5-3, 5-13
BPROT Register (Registers)
4-10
Branch Instructions (Instructions)
6-17
Break, Serial Transmission
2-24, 4-9, 5-3, 5-23, 9-1, 9-3,
9-6, 9-10, 9-11, 9-15, 9-16, 9-25, 9-26
Bulk Erase, EEPROM
4-5, 4-12
BYTE (Bit in PPROG)
4-11, 4-12, 4-13
Byte Erase, EEPROM
4-5, 4-13
–C–
CA (Bit in ADCTL)
5-5, 6-8, 6-19, 12-16
CB (Bit in ADCTL)
6-2, 12-16
CBYP (Bit in TEST1)
3-12, 3-13, 10-11
CC (Bit in ADCTL)
2-17, 2-18, 5-1, 5-2, 5-9, 5-11, 5-21,
5-23, 6-4, 6-5, 6-11, 12-14, 12-15, 12-16
CCF (Bit in ADCTL)
12-14, 12-15
CD Channel D Select (Bit in ADCTL)
6-11, 12-16
CFORC Register (Registers)
10-38
Chains, Clock Divider
9-7, 10-1, 10-5, 10-9
Charge Conservation 1
2-3, 12-4
Charge Pump
2-17, 2-18, 2-31, 4-4, 4-9, 4-25, 12-13
Charge Redistribution
12-1, 12-20
Cheater Latch
7-8
Clock Divider Chains
10-1, 10-5, 10-9
Clock Monitor
1-2, 2-16, 3-13, 3-18, 5-5
Clock Monitor Reset
5-7, 5-9
Clock Output (pins)
1-2, 1-6, 2-2, 2-8, 2-9, 2-11, 2-13, 2-15,
2-17, 2-18, 2-22, 2-25, 2-26, 2-33, 2-35, 2-36,
2-37, 3-8, 3-10, 3-11, 3-13, 4-1, 4-2, 4-4, 4-5, 4-6,
4-7, 4-8, 4-9, 4-10, 4-11, 4-12, 4-14, 4-16, 4-18,
4-19, 4-20, 4-21, 4-23, 4-24, 5-1, 5-2, 5-5, 5-8,
5-10, 5-25, 5-27, 6-1, 6-3, 6-6, 6-7, 7-2, 7-3, 7-8,
7-11, 7-16, 7-17, 7-19, 7-39, 7-40, 7-41, 7-42,
7-46, 7-47, 8-11, 9-1, 9-5, 9-6, 9-11, 9-13, 9-15,
9-21, 9-23, 9-30, 9-31, 9-33, 9-35, 10-1, 10-6,
10-18, 10-20, 10-36, 10-38, 10-42, 11-1, 11-2,
11-5, 11-6, 11-7, 11-8, 11-9, 11-10, 12-9, 12-12,
12-13, 12-17, 12-21
CME (Bit in OPTION)
3-9, 3-13, 5-9
Compare Inhibit
10-41, 10-42