參數(shù)資料
型號: M32000D3FP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 66.6 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 75/155頁
文件大小: 1340K
代理商: M32000D3FP
2-6
M32000D3FP User's Manual
CPU
2.4 Accumulator
The accumulator (ACC) is a 64-bit register used for the DSP function.
Use the MVTACHI and MVTACLO instructions for writing to the accumulator. The high-order 32 bits (bit 0
- bit 31) can be set with the MVTACHI instruction and the low-order 32 bits (bit 32 - bit 63) can be set with
the MVTACLO instruction. Use the MVFACHI, MVFACLO and MVFACMI instructions for reading from the
accumulator. The high-order 32 bits (bit 0 - bit 31) are read with the MVFACHI instruction, the low order
32 bits (bit 32 - bit 63) with the MVFACLO instruction and the middle 32 bits (bit 16 - bit 47) with the
MVFACMI instruction.
The MUL instruction also uses the accumulator and the contents are destroyed when this instruction is
executed.
Note: Bits 0 - 7 are always read as the sign-extended value of bit 8.
An attempt to write to this area is ignored.
31
0
PC
0
2.5 Program counter
The program counter (PC) is a 32-bit counter that retains the address of the instruction being executed.
Since the M32R CPU instruction starts with even-numbered addresses, the LSB (bit 31) is always "0".
32
48
63
31
16
15
0
47
78
ACC
(see note)
read/write range with
MVTACLO or MVFACLO instruction
read/write range with
MVTACHI or MVFACHI instruction
read range with MVFACMI instruction
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