參數(shù)資料
型號(hào): M32000D3FP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 66.6 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 146/155頁
文件大小: 1340K
代理商: M32000D3FP
6-10
M32000D3FP User's Manual
EXTERNAL BUS INTERFACE
6.4 Burst access operation
When accessing word size data aligned on the 32-bit boundary or fetching a maximum 4 words of instructions
aligned on the 128-bit boundary, the M32000D3FP carries out a burst transfer via the 16-bit data bus.
6.4.1 Burst read access
___________
The M32000D3FP outputs the BURST signal and carries out a burst transfer when reading the word-
size data aligned on the 32-bit boundary or a maximum 4 words of instructions aligned on the 128-bit
boundary.
____________
The BURST signal is synchronized with the CLKIN falling edge of the first bus access cycle and output "L"
level. It returns to an "H" level synchronized with the first CLKIN falling edge of the last bus access cycle.
Addresses A8 to A30 are output for each cycle.
When burst reading 32-bit data, the MSB-side 16-bit read bus cycle is carried out first followed by
the LSB-side 16-bit read bus cycle.
Fig. 6.4.1 1-word (32-bit) burst read timing (1-0 wait)
"H"
idle
CLKIN
BS
A8 - A30
SID, ST
BCH, BCL
BURST
D0 - D15
DC
R/W
burst read (1 word)
idle
"Hi-z"
Note: "Hi-z" means high-impedance, and
indicates sampling timing.
Wait cycles can be inserted even when burst transferring by setting
DC = "H".
Keep DC signal at the "H" level during idle cycles.
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