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參數(shù)資料
| 型號(hào)： | M32000D3FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 66.6 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 14/155頁(yè) |
| 文件大小： | 1340K |
| 代理商： | M32000D3FP |
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8-6
M32000D3FP User's Manual
POWER MANAGEMENT FUNCTION
______
Fig. 8.2.3 Return from standby mode on input of WKUP signal (slave mode operation)
CLKIN
(16.65 MHz)
STBY
internal clock
(66.6 MHz)
WKUP
INT or
SBI
internal INT
or SBI
internal
pipeline
operation restarts by
inputting INT or SBI signal
M32000D3FP
internal
external
input
returning period to
normal mode
(see note 1)
operation start
(vector fetch)
standby mode
idle
(see note 2)
Upon return following the WKUP input signal being input, it takes 40
s (max.) to switch to normal
operation mode from self-refresh mode. Access requests to the internal DRAM occurring during
this period are delayed until the completion of the mode switching.
Notes 1: Input the WKUP signal for at least 2 ms to stabilize oscillation in the clock generating circuit.
2: In slave mode the M32000D3FP enters the interrupt input wait state, after the WKUP signal is
returned to the "H" level.
3: When starting the M32000D3FP in slave mode after reset or after returning from standby mode,
the interrupt request is always accepted when an "L" level signal of 1 CLKIN width is input to the
INTpin or SBI pin, because they are continuously monitored.
1
3
In slave mode, the external bus access operation (reset vector fetch) immediately after returning
from standby mode, does not occur. The operation starts after the sampling of a 1 internal clock
length INT or SBI input, this being a start request.
2
The external bus state in slave mode is the same way as that in master mode. When the state
immediately before switching to standby mode is idle, the state becomes idle during standby
mode and immediately after returning. If the state is hold, the state becomes hold during standby
mode and immediately after returning.
8.2 Standby mode
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