參數資料
型號: M32000D3FP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 66.6 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-100
文件頁數: 47/155頁
文件大小: 1340K
代理商: M32000D3FP
ELECTRICAL CHARACTERISTICS
12-12
M32000D3FP User's Manual
12.4 AC characteristics
CLKIN
(input)
0.5 VCC
(input)
(output)
D0 to D15
(input)
th(CLKINL-D)
HREQ
R/W
40
52
53
54
55
(output)
tsu(HREQ-CLKIN)
HACK
41
43 td(CLKIN-HACKL)
45
(input)
CS
48 tsu(CS-CLKIN)
49 th(CLKIN-CS)
td(CLKIN-DV)
td(CLKIN-DZX)
50 tsu(A-CLKIN)
51 th(CLKIN-A)
(output)
DC
60 td(CLKIN-DCL)
59 td(CLKIN-DCHX)
42 td(CLKIN-HACKHX)
44
58 td(CS-DCZX)
td(CLKIN-HACKH)
td(CLKIN-HACKLX)
th(CLKIN-HREQ)
50
51
(input)
A8 to A30
BCH, BCL
50
51
50
51
48
49
tsu(D-CLKINL)
48
49
td(CLKIN-DXZ)
td(CLKIN-DVX)
56
57
td(CLKIN-DCLX)
td(CLKIN-DCXZ)
58
60
59
62
61
62
61
*1 All switching characteristics and timing requirements based on the falling edge of CLKIN are calculated according to
the internal CLKIN (duty ratio is 50%) . When designing external peripheral circuits, the correction for the duty cycle of
the actual CLKIN is necessary.
minimum value of tsu(CS-CLKIN) = (value in table) + (correction value) = 10 + (60 x 5/100) = 13 [ns]
minimum value of th(CLKIN-CS) = (value in table) + (correction value) = 2 + (60 x 5/100) = 5 [ns]
*1
[example]
CS signal transition ("L" –> "H") when inputting 16.65 MHz clock whose duty ratio is 45 - 55% (± 5%) to CLKIN:
Fig. 12.4.9 External bus master read/write timing
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