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82801AA and 82801AB Datasheet
5-31
Functional Description
5.8.3
APIC Bus Functional Description
5.8.3.1
Physical Characteristics of APIC
The APIC bus is a 3-wire synchronous bus connecting all I/O and local APICs. Two of these wires
are used for data transmission, and one wire is a clock. For bus arbitration, the APIC uses only one
of the data wires. The bus is logically a wire-OR and electrically an open-drain connection
providing for both bus use arbitration and arbitration for lowest priority. The APIC bus speed can
run from 16.67 MHz to 33 MHz.
5.8.3.2
APIC Bus Arbitration
The I/O APIC uses one wire arbitration to win bus ownership. A rotating priority scheme is used
for APIC bus arbitration. The winner of the arbitration becomes the lowest priority agent and
assumes an arbitration ID of 0. All other agents, except the agent whose arbitration ID is 15,
increment their Arbitration IDs by one. The agent whose ID was 15 takes the winner's arbitration
ID and increments it by one. Arbitration IDs are changed only for messages that are transmitted
successfully (except for the Low Priority messages). A message is transmitted successfully if no
CS error or acceptance error was reported for that message.
An APIC agent can use two different priority schemes: Normal or EOI. EOI has the highest
priority. EOI priority is used to send EOI messages for level interrupts from a local APIC to an I/O
APIC. When an agent requests the bus with EOI priority, all other agents requesting the bus with
normal priorities will back off.
When the ICH detects a bus idle condition on the APIC Bus, and it has an interrupt to send over the
APIC bus, it drives a start cycle to begin arbitration, by driving bit 0 to a ‘0’ on an APICCLK rising
edge. It then samples bit 1. If Bit 1 was a 0, then a local APIC started arbitration for an EOI
message on the same clock edge that the ICH started arbitration. The ICH has, thus, lost arbitration
and stops driving the APIC bus.
If the ICH did not see an EOI message start, it starts transferring its arbitration ID, located in bits
[27:24] of its Arbitration ID register (ARBID). Starting in Cycle 2, through Cycle 5, it tri-states bit
0, and drives bit 1 to a ‘0’ if ARBID[27] is a ‘1’. If ARBID[27] is a ‘0’, it also tri-states bit 1. At the
end of each cycle, the ICH samples the state of Bit 1 on the APIC bus. If the ICH did not drive Bit
1 (ARBID[27] = ‘0’), and it samples a ‘0’, then another APIC agent started arbitration for the APIC
bus at the same time as the ICH, and it has higher priority. The ICH stops driving the APIC bus.
Table 5-17
describes the arbitration cycles.
Table 5-17. Arbitration Cycles
Cycle
Bit 1
Bit 0
Comment
1
EOI
0
Bit 1 = 1: Normal, Bit 1 = 0: EOI
2
NOT (
ARBID[27]
)
1
Arbitration ID. If ICH samples a different value than it sent, it
lost arbitration.
3
NOT (
ARBID[26]
)
1
4
NOT (
ARBID[25]
)
1
5
NOT (
ARBID[24]
)
1