
82801AA and 82801AB Datasheet
A-3
Register Index
Device 31 Error Status Register
8Ah
Section 8.1.19, “D31_ERR_STS—Device 31 Error
Status Register (LPC I/F—D31:F0)” on page 8-10
Section 8.1.20, “PCI_DMA_CFG—PCI DMA
Configuration (LPC I/F—D31:F0)” on page 8-11
Section 8.8.1.1, “GEN_PMCON_1—General PM
Configuration 1 Register (PM—D31:F0)” on page 8-52
Section 8.8.1.2, “GEN_PMCON_2—General PM
Configuration 2 Register (PM—D31:F0)” on page 8-53
Section 8.8.1.3, “GEN_PMCON_3—General PM
Configuration 3 Register (PM—D31:F0)” on page 8-53
Section 8.8.1.4, “GPI_ROUT—GPI Routing Control
Register (PM—D31:F0)” on page 8-54
Section 8.8.1.5, “IO_MON_RNG1—IO Monitor Range 1
Register (PM—D31:F0)” on page 8-54
Section 8.8.1.6, “IO_MON_RNG2—IO Monitor Range 2
Register (PM—D31:F0)” on page 8-55
Section 8.8.1.7, “IO_MON_MSK—IO Monitor Range
Mask Register (PM—D31:F0)” on page 8-55
Section 8.1.21, “GEN_CNTL — General Control
Register (LPC I/F — D31:F0)” on page 8-11
Section 8.1.22, “GEN_STA—General Status (LPC I/F—
D31:F0)” on page 8-13
Section 8.1.23, “RTC_CONF—RTC Configuration
Register (LPC I/F—D31:F0)” on page 8-14
Section 8.1.24, “COM_DEC—LPC I/F Communication
Port Decode Ranges (LPC I/F—D31:F0)” on page 8-14
Section 8.1.25, “FDD/LPT_DEC—LPC I/F FDD & LPT
Decode Ranges (LPC I/F—D31:F0)” on page 8-15
Section 8.1.26, “SND_DEC—LPC I/F Sound Decode
Ranges (LPC I/F—D31:F0)” on page 8-15
Section 8.1.27, “GEN1_DEC—LPC I/F Generic Decode
Range 1 (LPC I/F—D31:F0)” on page 8-16
Section 8.1.28, “GEN2_DEC—LPC I/F Generic Decode
Range 2 (LPC I/F—D31:F0)” on page 8-16
Section 8.1.29, “LPC_EN—LPC I/F Enables (LPC I/F—
D31:F0)” on page 8-17
Section 8.1.32, “FUNC_DIS—Function Disable Register
(LPC I/F—D31:F0)” on page 8-20
PCI DMA Configuration Registers
90h–91h
General Power Management
Configuration 1
General Power Management
Configuration 2
General Power Management
Configuration 3
A0h
A2h
A4h
GPI_ROUT
B8h–BBh
IO_MON_RNG1
C4h
IO_MON_RNG2
C6h
IO_MON_MSK
CCh
General Control
D0h–D3h
General Status
D4h–D7h
Real Time Clock Configuration
D8h
LPC COM Port Decode Ranges
E0h
LPC FDD & LPT Decode Ranges
E1h
LPC Sound Decode Ranges
E2h
LPC General 1 Decode Range
E4h–E5h
LPC General 2 Decode Range
E6h–E7h
LPC Enables
ECh–EDh
Function Disable Register
F2h
Table A-1. ICH PCI Configuration Registers (Sheet 3 of 7)
Register Name
Offset
Datasheet Section and Location