
AC ’97 Modem Controller Registers (D31:F6)
13-8
82801AA and 82801AB Datasheet
13.2
AC’97 Modem I/O Space (D31:F6)
In the case of the split codec implementation accesses to the modem mixer registers in different
codecs are differentiated by the controller by using address offsets 00h
–
7Fh for the primary codec
and address offsets 80h
–
FEh for the secondary codec.
Table 13-2
shows the register addresses for
the modem mixer registers.
.
NOTE:
1. Registers in bold are multiplexed between audio and modem functions
2. Registers in italics are for functions not supported by the ICH
3. Software should not try to access reserved registers
4. The ICH supports a modem codec as either primary or secondary, but does not support two modem codecs.
The Global Control (GLOB_CNT) and Global Status (GLOB_STA) registers are aliased to the
same global registers in the audio and modem I/O space. Therefore, a read/write to these registers
in either audio or modem I/O space affects the same physical register.
These registers exist in I/O space and reside in the AC ‘97 controller. The two channels (Modem in
and Modem out) each have their own set of Bus Mastering registers. The following register
descriptions apply to both channels. The naming prefix convention used is as follows:
MI = Modem in channel
MO = Modem out channel
Table 13-2. ICH Modem Mixer Register Configuration
Register
MMBAR Exposed Registers (D31:F6)
Pri.
Sec.
Name
00h:38h
80h:B8h
Intel RESERVED
3Ch
BCh
Extended Modem ID
3Eh
BEh
Extended Modem Stat/Ctrl
40h
C0h
Line 1 DAC/ADC Rate
42h
C2h
Line 2 DAC/ADC Rate
44h
C4h
Handset DAC/ADC Rate
46h
C6h
Line 1 DAC/ADC Level Mute
48h
C8h
Line 2 DAC/ADC Level Mute
4Ah
CAh
Handset DAC/ADC Level Mute
4Ch
CCh
GPIO Pin Config
4Eh
CEh
GPIO Polarity/Type
50h
D0h
GPIO Pin Sticky
52h
D2h
GPIO Pin Wake Up
54h
D4h
GPIO Pin Status
56h
D6h
Misc. Modem AFE Stat/Ctrl
58h
D8h
Vendor Reserved
7Ah
FAh
Vendor Reserved
7Ch
FCh
Vendor ID1
7Eh
FEh
Vendor ID2