
Register Index
A-12
82801AA and 82801AB Datasheet
Table A-3. ICH Variable I/O Registers (Sheet 1 of 5)
Register Name
Offset
Datasheet Section and Location
Power Management I/O Registers at PMBASE+Offset
PMBASE set in Section 8.1.10, “PMBASE—ACPI Base Address (LPC I/F—D31:F0)” on page 8-6
PM1 Status
00h–01h
Section 8.8.3.1, “PM1_STS—Power Management 1
Status Register” on page 8-58
PM1 Enable
02h–03h
Section 8.8.3.2, “PM1_EN—Power Management 1
Enables Register” on page 8-59
PM1 Control
04h–07h
Section 8.8.3.3, “PM1_CNT—Power Management 1
Control” on page 8-60
PM1 Timer
08h–0Bh
Section 8.8.3.4, “PM1_TMR—Power Management 1
Timer Register” on page 8-60
Processor Control
10h–13h
Section 8.8.3.5, “PROC_CNT—Processor Control
Register” on page 8-61
Level 2 Register
14h
Section 8.8.3.6, “LV2 — Level 2 Register” on
page 8-62
General Purpose Event 0 Status
28h–29h
Section 8.8.3.7, “GPE0_STS—General Purpose
Event 0 Status Register” on page 8-62
General Purpose Event 0 Enables
2Ah–2Bh
Section 8.8.3.8, “GPE0_EN—General Purpose Event
0 Enables Register” on page 8-63
General Purpose Event 1 Status
2Ch–2Dh
Section 8.8.3.9, “GPE1_STS—General Purpose
Event 1 Status Register” on page 8-64
General Purpose Event 1 Enables
2Eh–2Fh
Section 8.8.3.10, “GPE1_EN—General Purpose
Event 1 Enable Register” on page 8-65
SMI# Control and Enable
30h–31h
Section 8.8.3.11, “SMI_EN—SMI Control and Enable
Register” on page 8-65
SMI Status Register
34h–35h
Section 8.8.3.12, “SMI_STS—SMI Status Register”
on page 8-66
Monitor SMI Status
40h
Section 8.8.3.13, “IOMON_STS_EN — I/O Monitor
Status and Enable Register” on page 8-67
Device Activity Status
44h
Section 8.8.3.14, “DEVACT_STS — Device Activity
Status Register” on page 8-68
Bus Address Tracker
4Ch
Section 8.8.3.15, “BUS_ADDR_TRACK— Bus
Address Tracker” on page 8-69
Bus Cycle Tracker
4Eh
Section 8.8.3.16, “BUS_CYC_TRACK— Bus Cycle
Tracker” on page 8-69