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82801AA and 82801AB Datasheet
A-5
Register Index
Header Type
0Eh
Section 10.1.9, “HEADTYP—Header Type Register
(USB—D31:F2)” on page 10-4
Section 10.1.10, “BASE—Base Address Register
(USB—D31:F2)” on page 10-4
Section 10.1.11, “SVID—Subsystem Vendor ID Register
(USB—D31:F2)” on page 10-5
Section 10.1.12, “SID—Subsystem ID Register (USB—
D31:F2)” on page 10-5
Section 10.1.13, “INTR_LN—Interrupt Line Register
(USB—D31:F2)” on page 10-5
Section 10.1.14, “INTR_PN—Interrupt Pin Register
(USB—D31:F2)” on page 10-5
Section 10.1.15, “SB_RELNUM—Serial Bus Release
Number Register (USB—D31:F2)” on page 10-6
Section 10.1.16, “USB_LEGKEY—USB Legacy
Keyboard/Mouse Control Register (USB—D31:F2)” on
page 10-6
Section 10.1.17, “USB_RES—USB Resume Enable
Register (USB—D31:F2)” on page 10-7
Base Address Register
20h–23h
Subsystem Vendor ID
2Ch–2Dh
Subsystem ID
2Eh–2Fh
Interrupt Line
3Ch
Interrupt Pin
3Dh
Serial Bus Release Number
60h
USB Legacy Keyboard/Mouse
Cotrol
C0h–C1h
USB Resume Enable
C4h
SMBus Controller (D31:F3)
Vendor ID
00h–01h
Section 11.1.1, “VID—Vendor Identification Register
(SMBUS—D31:F3)” on page 11-2
Section 11.1.2, “DID—Device Identification Register
(SMBUS—D31:F3)” on page 11-2
Section 11.1.3, “CMD—Command Register (SMBUS—
D31:F3)” on page 11-2
Section 11.1.4, “STA—Device Status Register
(SMBUS—D31:F3)” on page 11-3
Section 11.1.5, “RID—Revision ID Register (SMBUS—
D31:F3)” on page 11-3
Section 11.1.6, “PI—Programming Interface (SMBUS—
D31:F3)” on page 11-3
Section 11.1.7, “SCC—Sub Class Code Register
(SMBUS—D31:F3)” on page 11-4
Section 11.1.8, “BCC—Base Class Code Register
(SMBUS—D31:F3)” on page 11-4
Section 11.1.9, “HEADTYP—Header Type Register
(SMBUS—D31:F3)” on page 11-4
Section 11.1.10, “SMB_BASE—SMBus Base Address
Register (SMBUS—D31:F3)” on page 11-4
Section 11.1.11, “SVID—Subsystem Vendor ID Register
(SMBUS—D31:F3)” on page 11-5
Section 11.1.12, “SID—Subsystem ID Register
(SMBUS—D31:F3)” on page 11-5
Section 11.1.13, “INTR_LN—Interrupt Line Register
(SMBUS—D31:F3)” on page 11-5
Section 11.1.14, “INTR_PN—Interrupt Pin Register
(SMBUS—D31:F3)” on page 11-5
Section 11.1.15, “HOSTC—Host Configuration Register
(SMBUS—D31:F3)” on page 11-6
Device ID
02h–03h
Command Register
04h–05h
Device Status
06h–07h
Revision ID
08h
Programming Interface
09h
Sub Class Code
0Ah
Base Class Code
0Bh
Header Type
0Eh
SMB Base Address Register
20h–23h
Subsystem Vendor ID
2Ch–2Dh
Subsystem ID
2Eh–2Fh
Interrupt Line
3Ch
Interrupt Pin
3Dh
Host Configuration
40h
AC’97 Audio Controller (D31:F5)
Table A-1. ICH PCI Configuration Registers (Sheet 5 of 7)
Register Name
Offset
Datasheet Section and Location