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Register Index
A-4
82801AA and 82801AB Datasheet
IDE Controller (D31:F1)
Vendor ID
00h–01h
Section 9.1.1, “VID—Vendor ID Register (IDE—
D31:F1)” on page 9-2
Section 9.1.2, “DID—Device ID Register (IDE—
D31:F1)” on page 9-2
Section 9.1.3, “CMD—Command Register (IDE—
D31:F1)” on page 9-2
Section 9.1.4, “STA—Device Status Register (IDE—
D31:F1)” on page 9-3
Section 9.1.5, “RID—Revision ID Register (IDE—
D31:F1)” on page 9-3
Section 9.1.6, “PI—Programming Interface (IDE—
D31:F1)” on page 9-3
Section 9.1.7, “SCC—Sub Class Code (IDE—D31:F1)”
on page 9-4
Section 9.1.8, “BCC—Base Class Code (IDE—D31:F1)”
on page 9-4
Section 9.1.10, “HEADTYP—Header Type Register
(LPC I/F—D31:F0)” on page 9-4
Section 9.1.11, “BM_BASE—Bus Master Base Address
Register (IDE—D31:F1)” on page 9-5
Section 9.1.12, “SVID—Subsystem Vendor ID Register
(IDE—D31:F1)” on page 9-5
Section 9.1.13, “SID—Subsystem ID Register (IDE—
D31:F1)” on page 9-5
Section 9.1.14, “IDE_TIM—IDE Timing Register (IDE—
D31:F1)” on page 9-6
Section 9.1.15, “SLV_IDETIM—Slave (Drive 1) IDE
Timing Register (IDE—D31:F1)” on page 9-7
Section 9.1.16, “SDMA_CNT—Synchronous DMA
Control Register (IDE—D31:F1)” on page 9-8
Section 9.1.17, “SDMA_TIM—Synchronous DMA
Timing Register (IDE—D31:F1)” on page 9-9
Section 9.1.18, “IDE_CONFIG—IDE I/O Configuration
Register” on page 9-10
Device ID
02h–03h
Command Register
04h–05h
Device Status
06h–07h
Revision ID
08h
Programming Interface
09h
Sub Class Code
0Ah
Base Class Code
0Bh
Header Type
0Eh
Base Address Register
20h–23h
Subsystem Vendor ID
2Ch–2Dh
Subsystem ID
2Eh–2Fh
Primary IDE Timing
40h–43h
Slave IDE Timing
44h
Synchronous DMA Control Register
48h
Synchronous DMA Timing Register
4Ah–4Bh
IDE I/O Configuration Register
54h
USB Controller (D31:F2)
Vendor ID
00h–01h
Section 10.1.1, “VID—Vendor Identification Register
(USB—D31:F2)” on page 10-2
Section 10.1.2, “DID—Device Identification Register
(USB—D31:F2)” on page 10-2
Section 10.1.3, “CMD—Command Register (USB—
D31:F2)” on page 10-2
Section 10.1.4, “STA—Device Status Register (USB—
D31:F2)” on page 10-3
Section 10.1.5, “RID—Revision Identification Register
(USB—D31:F2)” on page 10-3
Section 10.1.6, “PI—Programming Interface (USB—
D31:F2)” on page 10-3
Section 10.1.7, “SCC—Sub Class Code Register
(USB—D31:F2)” on page 10-4
Section 10.1.8, “BCC—Base Class Code Register
(USB—D31:F2)” on page 10-4
Device ID
02h–03h
Command Register
04h–05h
Device Status
06h–07h
Revision ID
08h
Programming Interface
09h
Sub Class Code
0Ah
Base Class Code
0Bh
Table A-1. ICH PCI Configuration Registers (Sheet 4 of 7)
Register Name
Offset
Datasheet Section and Location