
82801AA and 82801AB Datasheet
5-91
Functional Description
OUT Transaction
A function may respond to an OUT transaction with a STALL, ACK, or NAK. If the transaction
contained corrupted data, it issues no response.
SETUP Transaction
Setup defines a special type of host to function data transaction which permits the host to initialize
an endpoint’s synchronization bits to those of the host. Upon receiving a Setup transaction, a
function must accept the data. Setup transactions cannot be STALLed or NAKed and the receiving
function must accept the Setup transfer’s data. If a non-control endpoint receives a SETUP PID, it
must ignore the transaction and return no response.
5.15.6
USB Interrupts
There are two general groups of USB interrupt sources, those resulting from execution of
transactions in the schedule, and those resulting from an ICH operation error. All transaction-based
sources can be masked by software through the ICH’s Interrupt Enable register. Additionally,
individual transfer descriptors can be marked to generate an interrupt on completion.
When the ICH drives an interrupt for USB, it drives the PIRQD# pin active for interrupts occurring
due to ports 0 and 1 until all sources of the interrupt are cleared.
5.15.6.1
Transaction Based Interrupts
These interrupts are not signaled until after the status for the last complete transaction in the frame
has been written back to host memory. This guarantees that software can safely process through
(Frame List Current Index -1) when it is servicing an interrupt.
CRC Error / Time-out
A CRC/Time-out error occurs when a packet transmitted from the ICH to a USB device or a packet
transmitted from a USB device to the ICH generates a CRC error. The ICH is informed of this
event by a time-out from the USB device or by the ICH’s CRC checker generating an error on
reception of the packet. Additionally, a USB bus time-out occurs when USB devices do not
respond to a transaction phase within 19 bit times of an EOP. Either of these conditions cause the
C_ERR field of the TD to decrement.
When the C_ERR field decrements to zero, the following occurs:
The Active bit in the TD is cleared
The Stalled bit in the TD is set
The CRC/Time-out bit in the TD is set.
At the end of the frame, the USB Error Interrupt bit is set in the HC status register.
If the CRC/Time out interrupt is enabled in the Interrupt Enable register, a hardware interrupt is
signaled to the system.