
82801AA and 82801AB Datasheet
A-9
Register Index
Aliased at 20h
–
21h
Aliased at 20h
–
21h
Aliased at 20h
–
21h
Aliased at 20h
–
21h
Counter 0 Interval Time Status Byte
Format
Counter 0 Counter Access Port
Register
Counter 1 Interval Time Status Byte
Format
Counter 1 Counter Access Port
Register
Counter 2 Interval Time Status Byte
Format
Counter 2 Counter Access Port
Register
30h–31h
34h–35h
38h–39h
3Ch–3Dh
40h
Section 8.3.2, “SBYTE_FMT—Interval Timer Status
Byte Format Register” on page 8-30
Section 8.3.3, “Counter Access Ports Register” on
page 8-31
Section 8.3.2, “SBYTE_FMT—Interval Timer Status
Byte Format Register” on page 8-30
Section 8.3.3, “Counter Access Ports Register” on
page 8-31
Section 8.3.2, “SBYTE_FMT—Interval Timer Status
Byte Format Register” on page 8-30
Section 8.3.3, “Counter Access Ports Register” on
page 8-31
Section 8.3.1, “TCW—Timer Control Word Register” on
page 8-28
Section 8.3.1.1, “RDBK_CMD—Read Back Command”
on page 8-29
Section 8.3.1.2, “LTCH_CMD—Counter Latch
Command” on page 8-30
41h
42h
Timer Control Word Register
Timer Control Word Register Read
Back
Counter Latch Command
43h
Aliased at 40h
–
43h
50h–53h
NMI Status and Control Register
61h
Section 8.7.1, “NMI_SC—NMI Status and Control
Register” on page 8-49
Section 8.7.2, “NMI_EN—NMI Enable (and Real Time
Clock Index)” on page 8-50
Table 8-7 “RTC (Standard) RAM Bank” on page 8-45
Section 8.7.2, “NMI_EN—NMI Enable (and Real Time
Clock Index)” on page 8-50
NMI Enable Register
70h
Real-Time Clock (Standard RAM)
Index Register
70h
Real-Time Clock (Standard RAM)
Target Register
Extended RAM Index Register
Extended RAM Target Register
71h
Table 8-7 “RTC (Standard) RAM Bank” on page 8-45
72h
73h
Aliased at 70h
–
71h
74h–75h
Aliased if U128E bit in RTC Configuration Register is
enalbed
Section 8.1.23, “RTC_CONF—RTC Configuration
Register (LPC I/F—D31:F0)” on page 8-14
Aliased to 70h–71h if U128E bit in RTC Configuration
Register is enalbed
Section 8.1.23, “RTC_CONF—RTC Configuration
Register (LPC I/F—D31:F0)” on page 8-14
Section 8.2.3, “DMAMEM_LP—DMA Memory Low Page
Registers” on page 8-23
Section 8.2.3, “DMAMEM_LP—DMA Memory Low Page
Registers” on page 8-23
Section 8.2.3, “DMAMEM_LP—DMA Memory Low Page
Registers” on page 8-23
Aliased at 72h
–
73h or 70h
–
71h
76h–77h
Channel 2 DMA Memory Low Page
Register
Channel 3 DMA Memory Low Page
Register
Channel 1 DMA Memory Low Page
Register
Reserved Page Registers
Channel 0 DMA Memory Low Page
Register
Reserved Page Register
81h
82h
83h
84h–86h
87h
Section 8.2.3, “DMAMEM_LP—DMA Memory Low Page
Registers” on page 8-23
88h
Table A-2. ICH Fixed I/O Registers (Sheet 2 of 4)
Register Name
Port
Datasheet Section and Location