
178
EPSON
S1C88409 TECHNICAL MANUAL
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
AVREF control
VRO
The VRO register is used to turn the reference
voltage AVREF for the A/D converter on and off.
AVREF is turned on and off by an external transis-
tor. An I/O port (P30–P37) which is not used for
inputting analog signals (including two terminals
used with the touch panel controller) is used to
drive the transistor using the VRO register value.
To set an I/O port for this function, set the I/O
port in the output mode and write "1" to the data
register. When "1" is written to the VRO register,
the I/O port terminal goes low. When "0" is
written, the terminal returns to high. If two or
more I/O ports are set in this status, all the
terminals are controlled with the VRO register.
Therefore, P30–P37 cannot be used as general-
purpose output ports.
When using P30 to P37 as general-purpose I/O
ports, the VRO and VRC registers must be set to
"0".
VRC
The VRC register enables the AVREF to be con-
trolled by the touch panel controller. The touch
panel controller controls the A/D converter during
its operation. By writing "1" to the VRC register,
the touch panel controller also controls AVREF in
the same way as the VRO register. Thus it is
unnecessary to change the VRO register while the
touch panel controller operates.
Input signal selection
The analog signals from the AD0 (P30)–AD7 (P37)
terminals are input to the multiplexer, and the
analog input channel for A/D conversion is
selected by software. This selection can be done
using the CHS register as shown in Table 5.18.4.3.
Table 5.18.4.3 Selection of analog input channel
CHS2
1
0
Input channel
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CHS1
1
0
1
0
CHS0
1
0
1
0
1
0
1
0
A/D conversion operation
An A/D conversion starts by writing data to the
ADRUN register. For example, when performing
A/D conversion using AD1 as the analog input,
write "1" (0, 0, 1) to the CHS register (CHS2, CHS1,
CHS0) and then write "1" to the ADRUN register.
The A/D input channel is selected and the A/D
conversion starts. However, it is necessary that the
P31 terminal has been set as an analog input
terminal.
The built-in sample/hold circuit starts sampling of
the analog input specified from tAD after writing.
When the sampling is completed, the held analog
input voltage is converted into a 10-bit digital
value in successive-approximation architecture.
The conversion result is loaded into the ADDR
(ADDR0–ADDR9) register. ADDR0 is the LSB and
ADDR9 is the MSB.
Note: If the CHS register selects an input channel
which is not included in the analog input
terminals set by the PAD register (the PAD
register can select several terminals
simultaneously), the A/D conversion does
not result in a correct converted value.
Example)
Terminal setting:
PAD5=1, PAD7=PAD6=PAD4–PAD0=0
(AD5 terminal is used)
Selection of input channel:
CHS2=1, CHS1=0, CHS0=0
(AD4 is selected)
In a setting like this, the A/D conversion
result will be invalid because the contents
of the settings are not matched.